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1.8V, Dual, 12-Bit, 125Msps ADC for Broadband Applications

Industry's Only Dual ADC in the High-Speed 12-Bit ADC Class

Product Details

Key Features

Applications/Uses

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Key Features

  • 125Msps Conversion Rate
  • Excellent Low-Noise Characteristics
    SNR = 67dB at fIN = 100MHz
    SNR = 65.3dB at fIN = 200MHz
  • Excellent Dynamic Range
  • SFDR = 85dBc at fIN = 100MHz
    SFDR = 80dBc at fIN = 200MHz
  • Single 1.8V Supply
  • 1.3W Power Dissipation at fSAMPLE = 125Msps and fIN = 10MHz
  • On-Chip Track-and-Hold Amplifier
  • Internal 1.24V Bandgap Reference
  • On-Chip Selectable Divide-by-2 Clock Input
  • LVDS Digital Outputs with Data Clock Output
  • EV Kit Available (Order MAX1217EVKIT)
  • Applications/Uses

    • ATE and Instrumentation
    • Cable Digital Return Path Transmitters
    • Cable Modem Termination Systems (CMTS)
    • Cellular Base-Station Power-Amplifier Linearization
    • IF and Baseband Digitization
    • Radar Systems

    Description

    The MAX1217 dual, monolithic, 12-bit, 125Msps analog-to-digital converter (ADC) provides outstanding dynamic performance up to a 250MHz input frequency. The device operates with conversion rates up to 125Msps while consuming only 650mW per channel.

    At 125Msps and an input frequency of 200MHz, the MAX1217 achieves an 80dBc spurious-free dynamic range (SFDR) with excellent 65.3dB signal-to-noise ratio (SNR) at 200MHz. The SNR remains flat (within 3dB) for input tones up to 200MHz. This makes the MAX1217 ideal for wideband applications such as communications receivers, cable head-end receivers, and power-amplifier predistortion in cellular base-station transceivers.

    The MAX1217 operates from a single 1.8V power supply. The analog inputs of each channel are designed for AC-coupled, differential or single-ended operation. The ADC also features a selectable on-chip divide-by-2 clock circuit that accepts clock frequencies as high as 250MHz and reduces the phase noise of the input clock source. A low-voltage differential signal (LVDS) sampling clock is recommended for best performance. The converter's digital outputs are LVDS compatible and the data format can be selected to be either two's complement or offset binary.

    The MAX1217 is available in a 100-pin TQFP package with exposed paddle and is specified over the extended (-40°C to +85°C) temperature range. Refer to the MAX1218 (170Msps) and the MAX1219 (210Msps) data sheets for higher speed, pin-compatible devices.

    Technical Docs

    Support & Training

    Search our knowledge base for answers to your technical questions.

    Filtered Search

    Our dedicated team of Applications Engineers are also available to answer your technical questions. Visit our support portal .