Top

Dual 10-Bit, 20Msps, +3V, Low-Power ADC with Internal Reference and Multiplexed Parallel Outputs

Product Details

Key Features

Parametric specs for High-Speed ADCs (> 5Msps)
Resolution (bits) 10
# Input Channels 2
Sample Rate (Msps) (max) 20
Data Bus Interface µP/10
SFDR (dBc) (min) 74
ENOB (bits) (min) 9.57
SINAD (dB) 59.4
SNR (dB) 59.5
THD (dB) -72
DNL (±LSB) 1
INL (±LSB) 1.5
Package/Pins TQFP/48
Budgetary
Price (See Notes)
5.82
View Less

Simplified Block Diagram

Support & Training

Search our knowledge base for answers to your technical questions.

Filtered Search

Our dedicated team of Applications Engineers are also available to answer your technical questions. Visit our support portal .

Parameters

Parametric specs for High-Speed ADCs (> 5Msps)
Resolution (bits) 10
# Input Channels 2
Sample Rate (Msps) (max) 20
Data Bus Interface µP/10
SFDR (dBc) (min) 74
ENOB (bits) (min) 9.57
SINAD (dB) 59.4
SNR (dB) 59.5
THD (dB) -72
DNL (±LSB) 1
INL (±LSB) 1.5
Package/Pins TQFP/48
Budgetary
Price (See Notes)
5.82

Key Features

  • Single +3V Operation
  • Excellent Dynamic Performance:
    • 59.5dB SNR at fIN = 7.5MHz
    • 74dB SFDR at fIN = 7.5MHz
  • Low Power:
    • 35mA (Normal Operation)
    • 2.8mA (Sleep Mode)
    • 1µA (Shutdown Mode)
  • 0.02dB Gain and 0.25° Phase Matching
  • Wide ±1VP-P Differential Analog Input Voltage Range
  • 400MHz, -3dB Input Bandwidth
  • On-Chip +2.048V Precision Bandgap Reference
  • Single 10-Bit Bus for Multiplexed, Digital Outputs
  • User-Selectable Output Format—Two's Complement or Offset Binary
  • 48-Pin TQFP Package with Exposed Pad for Improved Thermal Dissipation

Applications/Uses

  • High-Resolution Imaging
  • I/Q Channel Digitization
  • Instrumentation
  • Multichannel IF Sampling
  • Ultrasound
  • Video Application

Description

The MAX1185 is a 3V, dual 10-bit analog-to-digital converter (ADC) featuring fully-differential wideband track-and-hold (T/H) inputs, driving two pipelined, nine-stage ADCs. The MAX1185 is optimized for low-power, high dynamic performance applications in imaging, instrumentation, and digital communication applications. This ADC operates from a single 2.7V to 3.6V supply, consuming only 105mW while delivering a typical signal-to-noise ratio (SNR) of 59.5dB at an input frequency of 7.5MHz and a sampling rate of 20Msps. Digital outputs A and B are updated alternating on the rising (CHA) and falling (CHB) edge of the clock. The T/H driven input stages incorporate 400MHz (-3dB) input amplifiers. The converters may also be operated with single-ended inputs. In addition to low operating power, the MAX1185 features a 2.8mA sleep mode as well as a 1µA power-down mode to conserve power during idle periods.

An internal 2.048V precision bandgap reference sets the full-scale range of the ADC. A flexible reference structure allows the use of this internal or an externally derived reference, if desired for applications requiring increased accuracy or a different input voltage range. The MAX1185 features parallel, multiplexed, CMOS-compatible three-state outputs. The digital output format can be set to two's complement or straight offset binary through a single control pin. The device provides for a separate output power supply of 1.7V to 3.6V for flexible interfacing. The MAX1185 is available in a 7mm x 7mm, 48-pin TQFP package, and is specified for the extended industrial (-40°C to +85°C) temperature range.

Pin-compatible, nonmultiplexed. high-speed versions of the MAX1185 are also available. Refer to the MAX1180 data sheet for 105Msps, the MAX1181 data sheet for 80Msps, the MAX1182 data sheet for 65Msps, the MAX1183 data sheet for 40Msps, and the MAX1184 data sheet for 20Msps.

Simplified Block Diagram

MAX1185: Functional Diagram MAX1185: Functional Diagram Zoom icon

Support & Training

Search our knowledge base for answers to your technical questions.

Filtered Search

Our dedicated team of Applications Engineers are also available to answer your technical questions. Visit our support portal .