Simplified Block Diagram
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- Single 3V Operation
- Excellent Dynamic Performance:
- 59.6dB SNR at fIN = 20MHz
- 73dB SFDR at fIN = 20MHz
- Low Power:
- 40mA (Normal Operation)
- 2.8mA (Sleep Mode)
- 1µA (Shutdown Mode)
- 0.02dB Gain and 0.25° Phase Matching
- Wide ±1VP-P Differential Analog Input Voltage Range
- 400MHz -3dB Input Bandwidth
- On-Chip 2.048V Precision Bandgap Reference
- User-Selectable Output Format—Two's Complement or Offset Binary
- 48-Pin TQFP Package with Exposed Paddle for Improved Thermal Dissipation
- High-Resolution Imaging
- I/Q Channel Digitization
- Multichannel IF Sampling
- Video Application
An internal 2.048V precision bandgap reference sets the full-scale range of the ADC. A flexible reference structure allows the use of this internal or an externally derived reference, if desired for applications requiring increased accuracy or a different input voltage range. The MAX1183 features parallel, CMOS-compatible three-state outputs. The digital output format can be set to two's complement or straight offset binary through a single control pin. The device provides for a separate output power supply of 1.7V to 3.6V for flexible interfacing. The MAX1183 is available in a 7mm x 7mm, 48-pin TQFP package, and is specified for the extended industrial (-40°C to +85°C) temperature range.
Pin-compatible lower and higher speed versions of the MAX1183 are also available. See Table 2 at end of data sheet for a list of pin-compatible versions. Refer to the MAX1180 data sheet for 105Msps, the MAX1181 data sheet for 80Msps, the MAX1182 data sheet for 65Msps, and the MAX1184 data sheet for 20Msps. In addition to these speed grades, this family includes a multiplexed output version, for which digital data is presented time-interleaved and on a single, parallel 10-bit output port.