Dual 10-Bit, 65Msps, +3V, Low-Power ADC with Internal Reference and Parallel Outputs
DescriptionThe MAX1182 is a 3V, dual 10-bit analog-to-digital converter (ADC) featuring fully-differential wideband track-and-hold (T/H) inputs, driving two pipelined, 9-stage ADCs. The MAX1182 is optimized for low-power, high-dynamic performance applications in imaging, instrumentation and digital communication applications. This ADC operates from a single 2.7V to 3.6V supply, consuming only 195mW while delivering a typical signal-to-noise ratio (SNR) of 59dB at an input frequency of 20MHz and a sampling rate of 65Msps. The T/H driven input stages incorporate 400MHz (-3dB) input amplifiers. The converters may also be operated with single-ended inputs. In addition to low operating power, the MAX1182 features a 2.8mA sleep mode as well as a 1µA power-down mode to conserve power during idle periods.
An internal 2.048V precision bandgap reference sets the full-scale range of the ADC. A flexible reference structure allows the use of the internal or an externally derived reference, if desired for applications requiring increased accuracy or a different input voltage range.
The MAX1182 features parallel, CMOS-compatible three-state outputs. The digital output format is set to two's complement or straight offset binary through a single control pin. The device provides for a separate output power supply of 1.7V to 3.6V for flexible interfacing. The MAX1182 is available in a 7mm x 7mm, 48-pin TQFP package, and is specified for the extended industrial (-40°C to +85°C) temperature range.
Pin-compatible higher and lower speed versions of the MAX1182 are also available. Please refer to the MAX1180 data sheet for 105Msps, the MAX1181 data sheet for 80Msps, the MAX1183 data sheet for 40Msps, and the MAX1184 data sheet for 20Msps. In addition to these speed grades, this family includes a 20Msps multiplexed output version (MAX1185), for which digital data is presented time-interleaved on a single, parallel 10-bit output port.
- Single 3V Operation
- Excellent Dynamic Performance:
- 59dB SNR at fIN = 20MHz
- 77dB SFDR at fIN = 20MHz
- Low Power:
- 65mA (Normal Operation)
- 2.8mA (Sleep Mode)
- 1µA (Shutdown Mode)
- 0.02dB Gain and 0.25° Phase Matching (typ)
- Wide ±1VP-P Differential Analog Input Voltage Range
- 400MHz -3dB Input Bandwidth
- On-Chip 2.048V Precision Bandgap Reference
- User-Selectable Output Format—Two's Complement or Offset Binary
- 48-Pin TQFP Package with Exposed Pad for Improved Thermal Dissipation
- Evaluation Kit Available
- High-Resolution Imaging
- I/Q Channel Digitization
- Multichannel IF Undersampling
- Video Application
Technical DocumentsTutorial 1819 Selecting the Optimum Test Tones and Test Equipment for Successful High-Speed ADC Sinewave Testing
Tutorial 1040 Coherent Sampling vs. Window Sampling
Tutorial 729 Dynamic Testing of High-Speed ADCs, Part 2
Tutorial 728 Defining and Testing Dynamic Parameters in High-Speed ADCs, Part 1
|Device||Fab Process||Technology||Sample size||Rejects||FIT at 25°C||FIT at 55°C||Material Composition|
|Tutorial||1819||Selecting the Optimum Test Tones and Test Equipment for Successful High-Speed ADC Sinewave Testing|
|Tutorial||1040||Coherent Sampling vs. Window Sampling|
|Tutorial||729||Dynamic Testing of High-Speed ADCs, Part 2|
|Tutorial||728||Defining and Testing Dynamic Parameters in High-Speed ADCs, Part 1|