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+3V, 400ksps, 4/8 Channel, 8-Bit ADCs with 1µA Power Down

Low-Power +3V 8-Bit ADCs with Parallel Interface

Product Details

Key Features

Parametric specs for Precision ADCs (< 5Msps)
Resolution (bits) (ADC) 8
# Input Channels 8
Conv. Rate (ksps) (max) 400
Data Bus µP/8
ADC Architecture Flash
Diff/S.E. Input S.E. Only
External VREF (V) (min) 0
External VREF (V) (max) 3
Unipolar VIN (V) (max) 3
INL (±LSB) 1
Package/Pins SSOP/28
Budgetary
Price (See Notes)
5.74
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Simplified Block Diagram

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Parameters

Parametric specs for Precision ADCs (<u><</u> 5Msps)
Resolution (bits) (ADC) 8
# Input Channels 8
Conv. Rate (ksps) (max) 400
Data Bus µP/8
ADC Architecture Flash
Diff/S.E. Input S.E. Only
External VREF (V) (min) 0
External VREF (V) (max) 3
Unipolar VIN (V) (max) 3
INL (±LSB) 1
Package/Pins SSOP/28
Budgetary
Price (See Notes)
5.74

Key Features

  • +3.0V to +3.6V Single-Supply Operation
  • 4 (MAX113) or 8 (MAX117) Analog Input Channels
  • Low Power:
    • 1.5mA (operating mode)
    • 1µA (power-down mode)
  • Total Unadjusted Error < 1LSB
  • Fast Conversion Time: 1.8µs per Channel
  • No External Clock Required
  • Internal Track/Hold
  • Ratiometric Reference Inputs
  • Internally Connected 8th Channel Monitors Reference Voltage (MAX117)

Applications/Uses

  • Battery-Powered Applications
  • Communication Systems
  • Portable Equipment
  • Remote Data Acquisition
  • System-Health Monitoring

Description

The MAX113/MAX117 are microprocessor-compatible, 8-bit, 4-channel and 8-channel analog-to-digital converters (ADCs). They operate from a single +3V supply and use a half-flash technique to achieve a 1.8µs conversion time (400ksps). A power-down pin (active-low PWRDN) reduces current consumption to 1µA typical. The devices return from power-down mode to normal operating mode in less than 900ns, allowing large supply-current reductions in Burst Mode® applications. (In Burst Mode, the ADC wakes up from a low-power state at specified intervals to sample the analog input signals.) Both converters include a track/hold, enabling the ADC to digitize fast analog signals.

Microprocessor (µP) interfaces are simplified because the ADC can appear as a memory location or I/O port without external interface logic. The data outputs use latched, three-state buffer circuitry for direct connection to an 8-bit parallel µP data bus or system input port. The MAX113/MAX117 input/reference configuration enables ratiometric operation.

The 4-channel MAX113 is available in a 24-pin DIP or SSOP. The 8-channel MAX117 is available in a 28-pin DIP or SSOP. For +5V applications, refer to the MAX114/MAX118 data sheet.

Simplified Block Diagram

MAX113, MAX117: Functional Diagram MAX113, MAX117: Functional Diagram Zoom icon

Technical Docs

Support & Training

Search our knowledge base for answers to your technical questions.

Filtered Search

Our dedicated team of Applications Engineers are also available to answer your technical questions. Visit our support portal .