MAX1126

Quad, 12-Bit, 40Msps, 1.8V ADC with Serial LVDS Outputs

40Msps to 65Msps, Quad, 12-Bit LVDS ADC Family Offers the Lowest Power


Please check latest availability status for a specific part variant.

Description

The MAX1126 quad, 12-bit analog-to-digital converter (ADC) features fully differential inputs, a pipelined architecture, and digital error correction. This ADC is optimized for low-power, high-dynamic performance for medical imaging, communications, and instrumentation applications. The MAX1126 operates from a 1.7V to 1.9V single supply and consumes only 563mW while delivering a 69.9dB signal-to-noise ratio (SNR) at a 5.3MHz input frequency. In addition to low operating power, the MAX1126 features an 813µA power-down mode for idle periods.

An internal 1.24V precision bandgap reference sets the ADC's full-scale range. A flexible reference structure allows the use of an external reference for applications requiring increased accuracy or a different input voltage range.

A single-ended clock controls the conversion process. An internal duty-cycle equalizer allows for wide variations in input-clock duty cycle. An on-chip phase-locked loop (PLL) generates the high-speed serial low-voltage differential signaling (LVDS) clock.

The MAX1126 provides serial LVDS outputs for data, clock, and frame alignment signals. The output data is presented in two's complement or binary format.

Refer to the MAX1127 data sheet for a pin-compatible 65Msps version of the MAX1126.

The MAX1126 is available in a small, 10mm x 10mm x 0.9mm, 68-pin QFN package with exposed paddle and is specified for the extended industrial (-40°C to +85°C) temperature range.
MAX1126: Functional Diagram MAX1126: Functional Diagram Enlarge+

Key Features

  • Four ADC Channels with Serial LVDS/SLVS Outputs
  • Excellent Dynamic Performance
    • 69.9dB SNR at fIN = 5.3MHz
    • 93.7dBc SFDR at fIN = 5.3MHz
    • -90dB Channel Isolation
  • Ultra-Low Power
    • 135mW per Channel (Normal Operation)
    • 1.5mW Total (Shutdown Mode)
  • Accepts 20% to 80% Clock Duty Cycle
  • Self-Aligning Data-Clock to Data-Output Interface
  • Fully Differential Analog Inputs
  • Wide ±1.4VP-P Differential Input Voltage Range
  • Internal/External Reference Option
  • Test Mode for Digital Signal Integrity
  • LVDS Outputs Support Up to 30in FR-4 Backplane Connections
  • Small, 68-Pin QFN with Exposed Paddle
  • Evaluation Kit Available (MAX1127EVKIT)

Applications/Uses

  • Instrumentation
  • Multichannel Communication Systems
  • Positron Emission Tomography (PET) Imaging
  • Ultrasound and Medical Imaging
Part NumberInput Chan.Resolution
(bits)
Sample Rate
(Msps)
AC Specs
(MHz)
SFDR
(dBc)
ENOB
(bits)
SINAD
(dB)
SNR
(dB)
THD
(dB)
DNL
(±LSB)
INL
(±LSB)
Full Pwr. BW
(MHz)
ICC
(mA)
Data Bus InterfacePackage/Pins
max ≥@ fINminminmintyp
MAX1126 4124019.38911.369.169.2-88.70.250.4100297
LVDS
Serial
QFN/68
See All High-Speed ADCs (> 5Msps) (61)
Pricing Notes:
This pricing is BUDGETARY, for comparing similar parts. Prices are in U.S. dollars and subject to change. Quantity pricing may vary substantially and international prices may differ due to local duties, taxes, fees, and exchange rates. For volume-specific and version-specific prices and delivery, please see the price and availability page or contact an authorized distributor.

Quality and Environmental Data

Request Reliability Report for: MAX1126 
Lead-Free Package Tin (Sn) Whisker Reports

Additional Resources

Evaluation Kit: MAX1127EVKIT

CAD Symbols and Footprints

  • MAX11261ENX+
  • MAX11261ENX+T
  • MAX11262EUB+
  • MAX11262EUB+T
  • MAX1126EGK+D
  • MAX1126EGK+TD
  • MAX1126EGK-D
  • MAX1126EGK-TD
  • Device   Fab Process   Technology   Sample size   Rejects   FIT at 25°C   FIT at 55°C  

    Note : The failure rates are summarized by technology and mapped to the associated material part numbers. The failure rates are highly dependent on the number of units tested.

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