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4-Channel, 16-Bit, Simultaneous Sampling ADCs with PGA, Filter, and 8-/12-Bit Dual-Stage DAC

Industry's First Integrated Signal Converter for Automotive Adaptive Cruise Control

Product Details

Key Features

Parametric specs for Precision ADCs (< 5Msps)
Resolution (bits) (ADC) 16
# Input Channels 4
Conv. Rate (ksps) (max) 800
Data Bus SPI
ADC Architecture Sigma-Delta
Diff/S.E. Input Both
Internal VREF (V) (nominal) 2.5
External VREF (V) (min) 2
External VREF (V) (max) 2.8
Unipolar VIN (V) (max) 3.6
INL (±LSB) 2
Package/Pins TQFN/40
Budgetary
Price (See Notes)
12.94
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Simplified Block Diagram

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Parameters

Parametric specs for Precision ADCs (<u><</u> 5Msps)
Resolution (bits) (ADC) 16
# Input Channels 4
Conv. Rate (ksps) (max) 800
Data Bus SPI
ADC Architecture Sigma-Delta
Diff/S.E. Input Both
Internal VREF (V) (nominal) 2.5
External VREF (V) (min) 2
External VREF (V) (max) 2.8
Unipolar VIN (V) (max) 3.6
INL (±LSB) 2
Package/Pins TQFN/40
Budgetary
Price (See Notes)
12.94

Key Features

  • 4 Single-Ended or Differential Channels of Simultaneous-Sampling, 16-Bit ADCs
  • ±10 LSB INL, ±1 LSB DNL, No Missing Codes
  • 93dB SFDR at 100kHz Input
  • PGA with Gain of 1, 2, 4, 8, 16, 32, or 64 for Each Channel
  • EQ Function Automatically Boosts High-Frequency, Low-Amplitude Signals
  • Seven-Stage Internal Programmable Biquad Filters per Channel
  • High Throughput, 400ksps per Channel for 4 Channels
  • Dual-Stage DAC
    • Two 8-Bit Coarse Reference DACs
    • 12-Bit Fine DAC
  • +2.5V Internal Reference or +2.0V to +2.8V External Reference
  • Single +3.3V Operation
  • Shutdown and Power-Saving Modes
  • 40-Pin, 6mm x 6mm TQFN Package
  • -40°C to +125°C Operating Temperature

Applications/Uses

  • Automotive Radar Systems
  • Data Acquisition Systems
  • Industrial Controls
  • Power-Grid Monitoring

Description

The MAX11043 features 4 single-ended or differential channels of simultaneous-sampling ADCs with 16-bit resolution. The MAX11043 contains a versatile filter block and programmable-gain amplifier (PGA) per channel. The filter consists of seven cascaded 2nd-order filter sections for each channel, allowing the construction of a 14th-order filter. The filter coefficients are user-programmable. Configure each 2nd-order filter as lowpass (LP), highpass (HP), or bandpass (BP) with optional rectification. Gain and phase mismatch of the analog signal path is better than -50dB.

The ADC can digitize signals up to 200kHz. A 40MHz serial interface provides communication to and from the device. The SPI interface provides throughput of 1600ksps; 4 channels at 400ksps per channel or 2 channels at 800ksps per channel. A software-selectable scan mode allows reading the ADC results while simultaneously updating the DAC. Other features of the MAX11043 include an internal (+2.5V) or external (+2.0V to +2.8V) reference, power-saving modes, and a PGA with gains of 1 to 64. The PGA includes an equalizer (EQ) function that automatically boosts low-amplitude, high-frequency signals for applications such as CW-chirp radar.

The MAX11043 includes two 8-bit coarse DACs that set the high and low references for a second-stage 12-bit fine DAC, typically used for VCO control. Use software controls to write to the DAC or step the DAC up and down under hardware control in programmable steps. The device operates from a +3.0V to +3.6V supply. The MAX11043 is available in a 40-pin, 6mm x 6mm TQFN package and operates over the extended -40°C to +125°C temperature range.

Simplified Block Diagram

MAX11043: Typical Operating Circuit MAX11043: Typical Operating Circuit Zoom icon

Technical Docs

Support & Training

Search our knowledge base for answers to your technical questions.

Filtered Search

Our dedicated team of Applications Engineers are also available to answer your technical questions. Visit our support portal .