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12-Bit A/D Converter with 3-State Binary Outputs

Product Details

Key Features

Parametric specs for Display-Oriented ADCs
Resolution (±Counts) 4096
# Input Channels 1
Conv. Rate (ksps) (max) 0.03
Data Bus µP/12
UART
Diff/S.E. Input Diff. Only
Internal VREF (V) (nominal) -2.8
External VREF (V) (min) -5
External VREF (V) (max) 5
Bipolar VIN (±V) (max) 3.5
Package/Pins PDIP/40
PLCC/44
Budgetary
Price (See Notes)
6.48
View Less

Simplified Block Diagram

Technical Docs

Support & Training

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Sampling:
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Parameters

Parametric specs for Display-Oriented ADCs
Resolution (±Counts) 4096
# Input Channels 1
Conv. Rate (ksps) (max) 0.03
Data Bus µP/12
UART
Diff/S.E. Input Diff. Only
Internal VREF (V) (nominal) -2.8
External VREF (V) (min) -5
External VREF (V) (max) 5
Bipolar VIN (±V) (max) 3.5
Package/Pins PDIP/40
PLCC/44
Budgetary
Price (See Notes)
6.48

Key Features

  • Improved 2nd Source!
  • Zero Integrator Phase for Fast Overload Recovery
  • Hysteresis and "Crosstalk" Eliminated
  • Enhanced Bus Driving Capability
  • Byte Organized Three-state Outputs
  • UART Handshake Mode for Serial Interfacing
  • True Differential Input and Reference
  • Up to 30 Conversions per Second
  • Significantly Improved ESD Protection
  • Monolithic, Low Power CMOS Design

Applications/Uses

  • Current
  • Flow
  • Power
  • Pressure
  • Resistance
  • Speed
  • Temperature
  • Voltage
  • Weight

Description

The ICL7109 is a monolithic 12 bit A/D converter designed for easy interface with microprocessors and UARTs. The 12 bit binary plus polarity and over-range outputs can be directly interfaced to a microprocessor bus. In this mode the ICL7109 is controlled by the microprocessor through the chip select and tow byte enable inputs. For remote data logging applications the ICL7109 outputs are easily converted to a UART handshake mode, working with industry standard UARTs to provide serial data transmission.

This device offers high accuracy by lowering rollover error to less than 1 count and zero reading drift to less than 1μV/ °C. In many data acquisition systems the ICL7109 is an attractive, low cost, one-per-channel alternative to analog multiplexing due to its low power consumption and input bias current.

Maxim has added a zero-integrator phase to the ICL7109, eliminating overrange hangover, "crosstalk" and hysteresis effects. Maxim has also increased the current sourcing capabilities of the ICL7109, enabling it to rapidly drive the large capacitances often found on microprocessor busses.

Simplified Block Diagram

ICL7109: Typical Operating Circuit ICL7109: Typical Operating Circuit Zoom icon

Technical Docs

Support & Training

Search our knowledge base for answers to your technical questions.

Filtered Search

Our dedicated team of Applications Engineers are also available to answer your technical questions. Visit our support portal .

Sampling:
Selecting the Sample button above will redirect to the third-party ADI Sample Site. The part selected will carry over to your cart on this site once logged in. Please create a new account there if you have never used the site before. Contact SampleSupport@analog.com with any questions regarding this Sample Site.