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10-Bit, 7.5Msps, Full-Duplex, Analog Front-End

Ultra-Low Power AFE with Integrated Tx DACs, Rx ADCs, and Auxiliary Control Data Converters

Product Details

Key Features

Applications/Uses

Simplified Block Diagram

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Key Features

  • Dual 10-Bit, 7.5Msps Rx ADC and Dual 10-Bit, 7.5Msps Tx DAC
  • Ultra-Low Power
    30mW at fCLK = 7.5MHz, FD Mode
    21.3mW at fCLK = 7.5MHz, Slow Rx Mode
    21.9mW at fCLK = 7.5MHz, Slow Tx Mode
    Low-Current Standby and Shutdown Modes
  • Programmable Tx DAC Common-Mode DC Level and I/Q Offset Trim
  • Excellent Dynamic Performance
  • SNR = 54.9dB at fIN = 3.3MHz (Rx ADC)
    SFDR = 73.8dBc at fOUT = 620kHz (Tx DAC)
  • Three 12-Bit, 1µs Aux-DACs
  • 10-Bit, 333ksps Aux-ADC with 4:1 Input Mux and Data Averaging
  • Excellent Gain/Phase Match
  • ±0.01° Phase, ±0.01dB Gain (Rx ADC) at fIN = 1.8MHz
  • Multiplexed Parallel Digital I/O
  • Serial-Interface Control
  • Versatile Power-Control Circuits
  • Shutdown, Standby, Idle, Tx/Rx Disable
  • Miniature 56-Pin Thin QFN Package (7mm x 7mm x 0.8mm)
  • Applications/Uses

    • Broadband Access Radio
    • Portable Communication Equipment
    • Private Mobile Radio

    Description

    The MAX19710 is an ultra-low-power, highly integrated mixed-signal analog front-end (AFE) ideal for wideband communication applications operating in full-duplex (FD) mode. Optimized for high dynamic performance and ultra-low power, the device integrates a dual 10-bit, 7.5Msps receive (Rx) ADC; dual 10-bit, 7.5Msps transmit (Tx) DAC; three fast-settling 12-bit aux-DAC channels for ancillary RF front-end control; and a 10-bit, 333ksps housekeeping aux-ADC. The typical operating power in FD mode is 30mW at a 7.5MHz clock frequency.

    The Rx ADCs feature 54.8dB SINAD and 79.8dBc SFDR at 3.3MHz input frequency with a 7.5MHz clock frequency. The analog I/Q input amplifiers are fully differential and accept 1.024VP-P full-scale signals. Typical I/Q channel matching is ±0.01° phase and ±0.01dB gain.

    The Tx DACs feature 73.8dBc SFDR at fOUT = 620kHz and fCLK = 7.5MHz. The analog I-Q full-scale output voltage range is ±400mV differential. The output DC common- mode voltage is from 0.89V to 1.36V. The I/Q channel offset is adjustable to optimize radio lineup sideband/ carrier suppression. Typical I-Q channel matching is ±0.01dB gain and ±0.15° phase.

    Two independent 10-bit parallel, high-speed digital buses used by the Rx ADC and Tx DAC allow full-duplex operation for frequency-division duplex applications. The Rx ADC and Tx DAC can be disabled independently to optimize power management. A 3-wire serial interface controls power-management modes, the aux-DAC channels, and the aux-ADC channels.

    The MAX19710 operates on a single 2.7V to 3.3V analog supply and 1.8V to 3.3V digital I/O supply. The MAX19710 is specified for the extended (-40°C to +85°C) temperature range and is available in a 56-pin, thin QFN package. The Selector Guide at the end of the data sheet lists other pin-compatible versions in this AFE family. For time-division duplex (TDD) applications, refer to the MAX19705–MAX19708 AFE family of products.

    Simplified Block Diagram

    MAX19710: Typical Operating Circuit MAX19710: Typical Operating Circuit Zoom icon

    Technical Docs

    Support & Training

    Search our knowledge base for answers to your technical questions.

    Filtered Search

    Our dedicated team of Applications Engineers are also available to answer your technical questions. Visit our support portal .