10-bit, 11Msps, Ultra-Low-Power Analog Front-End

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The MAX19708 is an ultra-low-power, mixed-signal analog front-end (AFE) designed for TD-SCDMA handsets and data cards. Optimized for high dynamic performance at ultra-low power, the device integrates a dual 10-bit, 11Msps receive (Rx) ADC; dual 10-bit, 11Msps transmit (Tx) DAC with TD-SCDMA baseband filters; three fast-settling 12-bit aux-DAC channels for ancillary RF front-end control; and a 10-bit, 333ksps housekeeping aux-ADC. The typical operating power in Tx-Rx FAST mode is 36.9mW at a 5.12MHz clock frequency.

The Rx ADCs feature 55dB SNR and 77.4dBc SFDR at a 1.87MHz input frequency with an 11MHz clock frequency. The analog I/Q input amplifiers are fully differential and accept 1.024VP-P full-scale signals. Typical I/Q channel matching is ±0.08° phase and ±0.02dB gain.

The Tx DACs with TD-SCDMA lowpass filters feature -3dB cutoff frequency of 1.32MHz and > 55dB stopband rejection at fIMAGE = 4.32MHz. The analog I-Q full-scale output voltage range is selectable at ±410mV or ±500mV differential. The output DC common-mode voltage is selectable from 0.9V to 1.4V. The I/Q channel offset is adjustable to optimize radio lineup sideband/carrier suppression. Typical I-Q channel matching is ±0.02dB gain and ±0.04° phase.

The Rx ADC and Tx DAC share a single, 10-bit parallel, high-speed digital bus allowing half-duplex operation for time-division duplex (TDD) applications. A 3-wire serial interface controls power-management modes, the aux-DAC channels, and the aux-ADC channels. The MAX19708 operates on a single +2.7V to +3.3V analog supply and +1.8V to +3.3V digital I/O supply. The MAX19708 is specified for the extended (-40°C to +85°C) temperature range and is available in a 48-pin, thin QFN package. See a parametric table of the complete family of pin-compatible AFEs.
MAX19708: Functional Diagram MAX19708: Functional Diagram Enlarge+

Key Features

  • Dual 10-Bit, 11Msps Rx ADC and Dual 10-Bit, 11Msps Tx DAC
  • Ultra-Low Power
    • 36.9mW at fCLK = 5.12MHz, Fast Mode
    • 19.8mW at fCLK = 5.12MHz, Slow Mode
    • Low-Current Standby and Shutdown Modes
  • Integrated TD-SCDMA Filters with > 55dB Stopband Rejection
  • Programmable Tx DAC Common-Mode DC Level and I/Q Offset Trim
  • Excellent Dynamic Performance
    • SNR = 55dB at fIN = 1.87MHz (Rx ADC)
    • SFDR = 73dBc at fOUT = 620kHz (Tx DAC)
  • Three 12-Bit, 1µs Aux-DACs
  • 10-Bit, 333ksps Aux-ADC with 4:1 Input Mux and Data Averaging
  • Excellent Gain/Phase Match
    • ±0.08° Phase, ±0.02dB Gain (Rx ADC) at fIN = 1.87MHz
  • Multiplexed Parallel Digital I/O
  • Serial-Interface Control
  • Versatile Power-Control Circuits
    • Shutdown, Standby, Idle, Tx/Rx Disable
  • Miniature 48-Pin Thin QFN Package (7mm x 7mm x 0.8mm)


  • Portable Communication Equipment
  • TD-SCDMA Data Cards
  • TD-SCDMA Handsets

MAX19705EVKIT: Evaluation Kit for the MAX19705, MAX19706, MAX19707, and MAX19708
MAX19706EVKIT: Evaluation Kit for the MAX19705, MAX19706, MAX19707, and MAX19708
MAX19707EVKIT: Evaluation Kit for the MAX19705, MAX19706, MAX19707, and MAX19708
MAX19708EVKIT: Evaluation Kit for the MAX19705, MAX19706, MAX19707, and MAX19708

Technical Documents

App Note 3853 Equalizing Techniques Flatten DAC Frequency Response
Request Reliability Report for: MAX19708 
Device   Fab Process   Technology   Sample size   Rejects   FIT at 25°C   FIT at 55°C   Material Composition  

Note : The failure rates are summarized by technology and mapped to the associated material part numbers. The failure rates are highly dependent on the number of units tested.

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