MAX19706
10-Bit, 22Msps, Ultra-Low-Power Analog Front-End
AFE Family Optimized for Low-Power Portable Applications
MyMaxim SubscriptionsProduct Details
Key Features
Applications/Uses
Simplified Block Diagram
Technical Docs
| Data Sheet | 10-Bit, 22Msps, Ultra-Low-Power Analog Front-End | Nov 07, 2005 |
Support & Training
Search our knowledge base for answers to your technical questions.
Filtered SearchOur dedicated team of Applications Engineers are also available to answer your technical questions. Visit our support portal .
Key Features
- Dual, 10-Bit, 22Msps Rx ADC and Dual, 10-Bit, 22Msps Tx DAC
- Ultra-Low Power
- 49.5mW at fCLK = 22MHz, Fast Mode
- 39.3mW at fCLK = 22MHz, Slow Mode
- Low-Current Standby and Shutdown Modes
- Programmable Tx DAC Common-Mode DC Level and I/Q Offset Trim
- Excellent Dynamic Performance
- SNR = 54.6dB at fIN = 5.5MHz (Rx ADC)
- SFDR = 72.6dBc at fOUT = 2.2MHz (Tx DAC)
- Three 12-Bit, 1µs Aux-DACs
- 10-Bit, 333ksps Aux-ADC with 4:1 Input Mux and Data Averaging Mode
- Excellent Gain/Phase Match
- ±0.12° Phase, ±0.01dB Gain (Rx ADC) at fIN = 5.5MHz
- Multiplexed Parallel Digital I/O
- Serial-Interface Control
- Versatile Power-Control Circuits
- Shutdown, Standby, Idle, Tx/Rx Disable
- Miniature 48-Pin Thin QFN Package (7mm x 7mm x 0.8mm)
Applications/Uses
- 802.11a/b/g WLAN
- Portable Communication Equipment
- VoIP Terminals
- WiMAX™ and WiBro™ CPEs
Description
The Rx ADCs feature 54.6dB SNR and 75.6dBc SFDR at a 5.5MHz input frequency with a 22MHz clock frequency. The analog I/Q input amplifiers are fully differential and accept 1.024VP-P full-scale signals. Typical I/Q channel matching is ±0.12° phase and ±0.01dB gain.
The Tx DACs feature 72.6dBc SFDR at fOUT = 2.2MHz and fCLK = 22MHz. The analog I/Q full-scale output voltage is ±400mV differential. The Tx DAC common-mode DC level is programmable from 0.9V to 1.35V. The I/Q channel offset is adjustable. The typical I/Q channel matching is ±0.02dB gain and ±0.1° phase.
The Rx ADC and Tx DAC share a single, 10-bit parallel, high-speed digital bus allowing half-duplex operation for time-division duplex (TDD) applications. A 3-wire serial interface controls power-management modes, the aux-DAC channels, and the aux-ADC channels.
The MAX19706 operates on a single +2.7V to +3.3V analog supply and +1.8V to +3.3V digital I/O supply. The MAX19706 is specified for the extended (-40°C to +85°C) temperature range and is available in a 48-pin, thin QFN package. See a parametric table of the complete family of pin-compatible AFEs.
Technical Docs
| Data Sheet | 10-Bit, 22Msps, Ultra-Low-Power Analog Front-End | Nov 07, 2005 |
Support & Training
Search our knowledge base for answers to your technical questions.
Filtered SearchOur dedicated team of Applications Engineers are also available to answer your technical questions. Visit our support portal .
Request a Quote