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7.5Msps, Ultra-Low-Power Analog Front-End

Product Details

Key Features

Applications/Uses

Simplified Block Diagram

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Key Features

  • Dual 10-Bit Rx ADC and Dual 10-Bit Tx DAC
  • Ultra-Low Power
    • 36.3mW at fCLK = 5.12Msps, Fast Mode
    • 19.8mW at fCLK = 5.12Msps, Slow Mode
    • Low Standby and Shutdown Current
  • Integrated TD-SCDMA Filters with >55dB Stopband Rejection
  • Excellent Dynamic Performance
    • SINAD = 54.9dB at fIN = 1.87MHz (Rx ADC)
    • SFDR = 76.5dBc at fOUT = 620kHz (Tx DAC)
  • Excellent Gain/Phase Match
    • ±0.22° Phase, ±0.02dB Gain (Rx ADC) at fIN = 1.87MHz at -0.5dBFS
  • Three 12-Bit, 1µs Aux-DACs
  • Single-Supply Operation
  • Multiplexed Parallel Digital I/O
  • Serial-Interface Control
  • Versatile Power-Control Circuits
    • Shutdown, Standby, Idle, Tx-Rx Disable
  • Miniature 48-Pin Thin QFN Package (7mm x 7mm x 0.8mm)

Applications/Uses

  • Portable Communications Equipment
  • TD-SCDMA Data Cards
  • TD-SCDMA Handsets

Description

The MAX19700 is an ultra-low-power, mixed-signal analog front-end (AFE) designed for TD-SCDMA handsets and data cards. Optimized for high dynamic performance at ultra-low power, the MAX19700 integrates a dual 10-bit, 7.5Msps receive (Rx) ADC, dual 10-bit, 7.5Msps transmit (Tx) DAC with TD-SCDMA baseband filters, and three fast-settling 12-bit aux-DAC channels for ancillary RF front-end control. The typical operating power in Tx-Rx FAST mode is 36.3mW at a 5.12Msps clock frequency.

The Rx ADCs feature 54.9dB SINAD and 78dBc SFDR at a 1.87MHz input frequency with a 7.5Msps sample frequency. The analog I/Q input amplifiers are fully differential and accept 1.024VP-P full-scale signals. Typical I/Q channel matching is ±0.22° phase and ±0.02dB gain.

The Tx DACs with TD-SCDMA lowpass filters feature -3dB cutoff frequency of 1.27MHz and >55dB stopband rejection at fIMAGE = 4.32MHz. The analog I/Q full-scale output voltage range is selectable at ±410mV or ±500mV. The output common-mode voltage is selectable from 0.9V to 1.4V and the I/Q channel offset is adjustable. The typical I/Q channel matching is ±0.05dB gain and ±0.16° phase.

The Rx ADC and Tx DAC share a single, 10-bit parallel, high-speed digital bus allowing half-duplex operation for time-division duplex (TDD) applications. A 3-wire serial interface controls power-management modes and the aux-DAC channels.

The MAX19700 operates on a single +2.7V to +3.3V analog supply and +1.8V to +3.3V digital I/O supply. The MAX19700 is specified for the extended (-40°C to +85°C) temperature range and is available in a 48-pin, thin QFN package. See a parametric table of the complete family of pin-compatible AFEs.

Simplified Block Diagram

MAX19700: Functional Diagram MAX19700: Functional Diagram Zoom icon

Support & Training

Search our knowledge base for answers to your technical questions.

Filtered Search

Our dedicated team of Applications Engineers are also available to answer your technical questions. Visit our support portal .