Simplified Block Diagram
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- < 0.7psRMS from 12kHz to 20MHz Jitter
- LVDS or LVPECL Output Types
- 3.3V Operating Voltage
- 5.0mm x 3.2mm x 1.49mm, 10-Pin LCCC Ceramic Package
- -40°C to +85°C Operating Temperature Range
- Lead-Free/RoHS Compliant
- Fibre Channel
- Host Bus Adapters
These clock oscillators are crystal based and use a fundamental crystal with PLL technology to provide the final output frequencies. Each device is offered with LVDS or LVPECL output types. The output enable pin is active-high logic.
These clock oscillators have very low phase jitter and phase noise. Typical phase jitter is < 0.7psRMS from 12kHz to 20MHz. The devices are designed to operate with a 3.3V ±5% supply voltage, and are available in a 5.0mm x 3.2mm x 1.49mm, 10-pin LCCC surface-mount ceramic package.