5-Tap Economy Timing Element (Delay Line)

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The DS1100 series delay lines have five equally spaced taps providing delays from 4ns to 500ns. These devices are offered in surface-mount packages to save PCB area. Low cost and superior reliability over hybrid technology is achieved by the combination of a 100% silicon delay line and industry-standard µMAX® and SO packaging. The DS1100 5-tap silicon delay line reproduces the input-logic state at the output after a fixed delay as specified by the extension of the part number after the dash. The DS1100 is designed to reproduce both leading and trailing edges with equal precision. Each tap can drive up to 10 74LS loads.

Maxim can customize standard products to meet special needs.
DS1100: Pin Assignment DS1100: Pin Assignment Enlarge+

Key Features

  • All-silicon timing circuit
  • Five taps equally spaced
  • 5V Operation
  • Delays are stable and precise
  • Both leading- and trailing-edge accuracy
  • Improved replacement for DS1000
  • Low-power CMOS
  • TTL/CMOS-compatible
  • Vapor-phase, IR, and wave solderable
  • Custom delays available
  • Fast-turn prototypes
  • Delays specified over both commercial and industrial temperature ranges

See parametric specs for Delay-Lines (Non-Programmable) (6)

Part NumberFunctionsTapsTotal Delays
See Notes
DS1100 Tapped520 to 5005±5%
SOIC (N)/8
$3.01 @1k

Pricing Notes:
This pricing is BUDGETARY, for comparing similar parts. Prices are in U.S. dollars and subject to change. Quantity pricing may vary substantially and international prices may differ due to local duties, taxes, fees, and exchange rates. For volume-specific and version-specific prices and delivery, please see the price and availability page or contact an authorized distributor.
Product Reliability Reports: DS1100.pdf 
Device   Fab Process   Technology   Sample size   Rejects   FIT at 25°C   FIT at 55°C   Material Composition  

Note : The failure rates are summarized by technology and mapped to the associated material part numbers. The failure rates are highly dependent on the number of units tested.

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