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8-Bit Programmable Timing Element

Product Details

The DS1023 is an 8-bit programmable delay line similar in function to the DS1020/DS1021.

Additional features have been added to extend the range of applications:
The internal delay line architecture has been revised to allow clock signals to be delayed by up to a full period or more. Combined with an on-chip reference delay (to offset the inherent or "step zero" delay of the device) clock phase can now be varied over the full 0-360 degree range.

On-chip gating is provided to allow the device to provide a pulse width modulated output, triggered by the input with duration set by the programmed value.

Alternatively the output signal may be inverted on chip, allowing the device to perform as a free-running oscillator if the output is (externally) connected to the input.

Key Features

  • Step sizes of 0.25 ns, 0.5 ns, 1 ns, 2 ns, 5 ns
  • On-chip reference delay
  • Configurable as delay line, pulse width modulator, or free-running oscillator
  • Can delay clocks by a full period or more
  • Guaranteed monotonicity
  • Parallel or serial programming
  • Single 5V supply
  • 16-pin DIP or SOIC package

Applications/Uses

Simplified Block Diagram

DS1023: Functional Block Diagram DS1023: Functional Block Diagram Zoom icon

Technical Docs

Data Sheet 8-Bit Programmable Timing Element Jul 07, 2005

Design & Development

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Parameters

Key Features

  • Step sizes of 0.25 ns, 0.5 ns, 1 ns, 2 ns, 5 ns
  • On-chip reference delay
  • Configurable as delay line, pulse width modulator, or free-running oscillator
  • Can delay clocks by a full period or more
  • Guaranteed monotonicity
  • Parallel or serial programming
  • Single 5V supply
  • 16-pin DIP or SOIC package

Applications/Uses

Description

The DS1023 is an 8-bit programmable delay line similar in function to the DS1020/DS1021.

Additional features have been added to extend the range of applications:
The internal delay line architecture has been revised to allow clock signals to be delayed by up to a full period or more. Combined with an on-chip reference delay (to offset the inherent or "step zero" delay of the device) clock phase can now be varied over the full 0-360 degree range.

On-chip gating is provided to allow the device to provide a pulse width modulated output, triggered by the input with duration set by the programmed value.

Alternatively the output signal may be inverted on chip, allowing the device to perform as a free-running oscillator if the output is (externally) connected to the input.

Simplified Block Diagram

DS1023: Functional Block Diagram DS1023: Functional Block Diagram Zoom icon

Technical Docs

Data Sheet 8-Bit Programmable Timing Element Jul 07, 2005

Support & Training

Search our knowledge base for answers to your technical questions.

Filtered Search

Our dedicated team of Applications Engineers are also available to answer your technical questions. Visit our support portal