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Single/Dual, Ultra-Fast, ECL-Output Comparators with Latch Enable

Ultra-Fast, 1.2ns ECL Output Comparator with Latch Enable

Product Details

Key Features

Parametric specs for Comparators
tPD (ns) (typ) 1.2
VOS (mV) (max) 6.5
VSUPPLY (Total) (V) (min) 9.5
VSUPPLY (Total) (V) (max) 10.5
# Comparators 2
ICC per Comp. (µA) (max) 23000
Logic Out ECL
Oper. Temp. (°C) -40 to +85
Package/Pins PDIP/16
SOIC (N)/16
Budgetary
Price (See Notes)
5.6
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Simplified Block Diagram

Technical Docs

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Selecting the Sample button above will redirect to the third-party ADI Sample Site. The part selected will carry over to your cart on this site once logged in. Please create a new account there if you have never used the site before. Contact SampleSupport@analog.com with any questions regarding this Sample Site.

Parameters

Parametric specs for Comparators
tPD (ns) (typ) 1.2
VOS (mV) (max) 6.5
VSUPPLY (Total) (V) (min) 9.5
VSUPPLY (Total) (V) (max) 10.5
# Comparators 2
ICC per Comp. (µA) (max) 23000
Logic Out ECL
Oper. Temp. (°C) -40 to +85
Package/Pins PDIP/16
SOIC (N)/16
Budgetary
Price (See Notes)
5.6

Key Features

  • 1.2ns Propagation Delay
  • 100ps Propagation Delay Skew
  • 150ps Dispersion
  • 0.5ns Latch Setup Time
  • 0.5ns Latch-Enable Pulse Width
  • Available in µMAX and QSOP Packages
  • +5V, -5.2V Power Supplies

Applications/Uses

  • High-Speed Line Receivers
  • High-Speed Triggering
  • Peak Detectors
  • Threshold Detectors

Description

The MAX9691/MAX9692/MAX9693 are ultra-fast ECL comparators capable of very short propagation delays. Their design maintains the excellent DC matching characteristics normally found only in slower comparators.

The MAX9691/MAX9692/MAX9693 have differential inputs and complementary outputs that are fully compatible with ECL-logic levels. Output current levels are capable of driving 50Ω terminated transmission lines. The ultra-fast operation makes signal processing possible at frequencies in excess of 600MHz.

The MAX9692/MAX9693 feature a latch-enable (LE) function that allows the comparator to be used in a sample-hold mode. When LE is ECL high, the comparator functions normally. When LE is driven ECL low, the outputs are forced to an unambiguous ECL-logic state, dependent on the input conditions at the time of the latch input transition. If the latch-enable function is not used on either of the two comparators, the appropriate LE input must be connected to ground; the companion active-low LE input must be connected to a high ECL logic level.

These devices are available in SO, QSOP, and tiny µMAX® packages for added space savings.

Simplified Block Diagram

MAX9691, MAX9692, MAX9693: Functional Diagram MAX9691, MAX9692, MAX9693: Functional Diagram Zoom icon

Technical Docs

Support & Training

Search our knowledge base for answers to your technical questions.

Filtered Search

Our dedicated team of Applications Engineers are also available to answer your technical questions. Visit our support portal .

Sampling:
Selecting the Sample button above will redirect to the third-party ADI Sample Site. The part selected will carry over to your cart on this site once logged in. Please create a new account there if you have never used the site before. Contact SampleSupport@analog.com with any questions regarding this Sample Site.