Product Details
Key Features
Applications/Uses
Simplified Block Diagram
Technical Docs
Data Sheet | Octal 3.0Gbps DCL with Integrated Level Setting DACs, Cable Droop Compensation, and PMU switches | Mar 07, 2022 | |
Design Solution | New Octal Pin Electronic Driver for Next Generation ATE Systems |
Support & Training
Search our knowledge base for answers to your technical questions.
Filtered SearchOur dedicated team of Applications Engineers are also available to answer your technical questions. Visit our support portal .
Key Features
- Low Power at High-Speed Maximizes Driver Performance
- Typical 0.89W Per Channel Power Dissipation
- 10nA Low-Leak Mode
- High-Speed Data Rate (50Ω)
- 3.0Gbps Typical at 0.1Vpp
- 2.5Gbps Typical at 0.5Vpp
- 2.4Gbps Typical at 0.75Vpp
- 1.3Gbps Typical at 1.5Vpp
- Voltage Range from -1.5V to +4.5V
- Integrated VHH Programming Mode (4th-Level Drive) up to 7.1V
- Integrated Functionality Provides Value-Add Features
- Integrated ±12mA Passive Load
- Programmable Double Time Constant Cable Droop Compensation–Drive and Receive Paths
- Digital Slew-Rate Control for EMI-Sensitive Applications
- 64 Independent 14-bit Level-Setting DACs
- 50MHz SPI Interface
Applications/Uses
- SoC ATE
- Memory ATE
- Digital Testers
- Burn-In Testers
- Wafer Testers
Description
The MAX32007 is a fully integrated, high performance, high speed 3Gbps octal-channel pin electronics driver that integrates multiple automatic test equipment (ATE) functions into a single IC. This DCL (driver/comparator/load) device is compatible with most high-speed logic families and includes a 4-level driver, dynamic clamps, window comparator, passive load, differential comparator, slew rate control, driver and comparator cable droop compensation, voltage clamps, PMU switches, and level-setting DACs.
The MAX32007 driver features a -1.5V to +4.5V input range, high-impedance mode, active-termination (3rd-level drive), and VHH programming (4th-level drive) up to 7.1V. The window comparators provide low timing variation over changes in slew rate, pulse width, or overdrive voltage. The MAX32007 features dynamic clamps that limit high-speed device-under-test (DUT) waveforms as well as cable droop compensation for optimization of driver and return path signals. The integrated passive load is rated for ±12mA. Configuration of the many features are done through a 50MHz SPI interface.
The MAX32007 is available in a 16mm x 10mm x 1.4mm csBGA package with exposed pad on the top for easy heat removal. The ball pitch is 0.8mm with a ball grid array of 19x12. Typical power dissipation is rated for 0.89W per channel. The MAX32007 operates over an internal die temperature range of +40°C to +100°C with a nominal operating point of +70°C. The device provides both a temperature monitor output (TSA) and an over-temp indicator (TSD).
Simplified Block Diagram
Technical Docs
Data Sheet | Octal 3.0Gbps DCL with Integrated Level Setting DACs, Cable Droop Compensation, and PMU switches | Mar 07, 2022 | |
Design Solution | New Octal Pin Electronic Driver for Next Generation ATE Systems |
Support & Training
Search our knowledge base for answers to your technical questions.
Filtered SearchOur dedicated team of Applications Engineers are also available to answer your technical questions. Visit our support portal .