Software Driver Development Guidelines for the 78Q8430

Abstract: The 78Q8430 is a 10/100 Fast Ethernet MAC and PHY controller supporting multi-media offload. The device is optimized to enhance throughput and offload network protocol tasks from the host processordemanding multi-media applications found in Set Top Boxes, IP video, and Broadband Media Appliances.

This document provides guidelines for developing the software driver needed to implement the hardware supported features of the 78Q8430. A description of each feature and the procedure required to exercise the feature is included. The guidelines presented in this document assume a basic knowledge of the 78Q8430 architecture and operation and familiarity with the 78Q8430 register set. Appendix B provideslist of the register acronyms and descriptions.

For more information refer to the 78Q8430 Data Sheet. For an overview of the 78Q8430 functional blocks refer to Figure 5: Device Block Diagram in the data sheet. Data sheet Figure 13: Internal Digital Block Diagram presents an overview of the functional layers, internal connections and external signals. The \"Register Descriptions\" section of the data sheet contains a detailed description of the registers.