The circuit of Figure 1
generates two supply voltages commonly required in pagers and other portable instruments that have small, graphic liquid-crystal displays: a regulated 3.3V at 100mA, and a regulated negative output suitable for use as an LCD bias voltage. Overall efficiency is about 80%.
Figure 1. This circuit establishes a regulated VCC (3.3V or 5V) and a regulated, negative, LCD-bias voltage (-8V in this case).
The main 3.3V supply is provided by a boost converter (IC1) operating in its standard configuration. The auxiliary bias voltage is provided by an extra flyback winding (the T1 secondary) and is regulated via Q1 and the low-battery detector internal to IC1.
As the battery discharges, its declining terminal voltage causes a decline in the voltage induced in the flyback winding. At minimum battery voltage (0.8V), the T1 primary sees 3.3V - 0.8V = 2.5V; thus, the 6:1 turns ratio produces 6 × 2.5 = 15V in the secondary. At maximum battery voltage (1.65V), the primary sees only 1.65V, producing 9.9V in the secondary. MOSFET Q1 stabilizes this output by interrupting the secondary current, introducing the regulation necessary to generate a constant (and therefore useful) negative output.
The regulator employs IC1's low-battery detector (a comparator/reference combination) as an on/off controller for Q1. Normally, the input (LBI) monitors a positive battery voltage and drives the output (LBO) low when LBI drops below 1.25V. In this circuit, the R1/R2 divider holds LBI between VCTRL
(normally 3.3V) and the LCD bias output (normally -8V). The R1 and R2 values are chosen such that LBO turns Q1 off when the LCD bias becomes too negative (and pulls the LBI voltage below 1.25V). Load current then causes the LCD bias to drift upward (toward 0V) until LBI exceeds 1.25V, which causes Q1 to turn on again.
The bias output makes excursions above and below its nominal value, producing a ripple voltage whose frequency depends on the size of the output filter capacitor, the output load, and the hysteresis in IC1's low-battery comparator. This frequency is about 150Hz for the circuit shown, and the hysteresis (about 25mV) dominates ripple magnitude. Multiplied by the R1/R2 ratio, the hysteresis results in a ripple amplitude (for -8V/1mA output) of about 100mV. Because ripple is essential to operation in this hysteretic converter, it cannot be reduced directly. Most LCDs are very forgiving of bias ripple. Otherwise, ripple can be minimized by adding an RC network or linear regulator at the negative output.
A logic signal at the LCD ON terminal provides a means to enable and disable the negative output. This signal voltage also sets the feedback level, and therefore should have a full CMOS swing. In addition, you can apply a variable voltage at LCD ON to make the output variable. Voltages below 1.25V turn the output off, and voltages greater than 1.25V change the output with a slope of -R1/R2 (VCTRL
- 1.25V), with an offset of 1.25V. This variable input, generated by a low-power digital-to-analog converter or the filtered pulse-width-modulator output from a microcontroller, can vary the LCD contrast in response to a change in temperature or viewing conditions. (See the output voltage equation in Figure 1.)
The main voltage can be changed from 3.3V to 5V by grounding the 3/active-low 5 terminal on IC1. In that case, the turns ratio should also be reduced to 3:1 because the highest battery voltage will induce 3.35V in the T1 primary. Then adjust the R1 and R2 values to obtain the desired negative-output level.
A similar idea appeared in the November 4, 1996 issue of Electronic Design.