APPLICATION NOTE 873

High-Speed Signal Distribution Using Low-Voltage Differential Signaling (LVDS)


Abstract: The ANSI EIA/TIA-644 standard for Low Voltage Differential Signaling (LVDS) is well suited for a variety of applications including clock distribution, point-to-point and point-to-multipoint signal distribution. This note describes methods for distributing high-speed communications signals to different destinations using LVDS signaling.

Low-voltage differential signaling (LVDS) is well-suited for a variety of applications, including clock distribution and point-to-multipoint signal distribution. This note describes methods for distributing high-speed signals to different destinations.

Clock distribution is of great importance in digital systems where different subsystems are required to work with the same clock reference. For example, the DSP section of a basestation must, in most cases, be synchronized to the radio-frequency signal processing section, which is where phase-locked loops (PLLs) produce the required local oscillator frequencies and where analog-to-digital converters are locked to the central clock reference. Also, when working with applications that include radio receivers, the clock (and the signals) must be distributed with the lowest possible emission levels to avoid interfering with low-level signal paths.

When distributing high-speed signals to different destinations, various strategies can be employed. Two approaches represent the extremes within which you find the range of strategies: one, driving all destinations from a single source/driver (called "multi-drop distribution"); two, using a separate driver for each destination (called "multiple point-to-point distribution"). Figure 1 shows the difference between these two types of distribution with two typical techniques. In multi-drop distribution, a driver of sufficient drive capability drives all receivers and the intervening media (cable, connectors(s), backplane). The bus is usually terminated in its characteristic impedance at the final receiver. Efforts must be made to keep all "stubs" or branches from the bus as short as possible to avoid possible signal integrity problems. On the high-density printed circuit boards of today, controlling stub length is not always simple.

Figure 1. Multi-drop signal distribution permits communication between one transmitter and multiple receivers, whereas multiple point-to-point signal distribution, which doesn't require tuning stubs, eliminates the disturbances that those stubs can potentially create.
Figure 1. Multi-drop signal distribution permits communication between one transmitter and multiple receivers, whereas multiple point-to-point signal distribution, which doesn't require tuning stubs, eliminates the disturbances that those stubs can potentially create.

A multiple point-to-point strategy, by contrast, employs multiple drivers, which need only be specified for point-to-point operation, as each driver communicates with a single locally terminated receiver. With this scheme the problems of signal integrity are reduced to ensuring that the impedance of the medium is as uniform as possible; the disturbance that stubs could potentially cause is eliminated.

An IC that can be used for multiple point-to-point signal distribution is the new MAX9150 low-jitter 10-port LVDS repeater, which is described in the following sections.

Characteristics of the MAX9150 LVDS Repeater

The MAX9150 suits applications that require high-speed data or clock distribution while minimizing the power and board real-estate consumed and the noise that's generated. The IC in Figure 2 accepts a single LVDS input, which it replicates at each of its 10 LVDS outputs.

Figure 2. The MAX9150 repeater distributes an LVDS signal received at its input to as many as ten locations. The MAX9110 translates the CMOS signal applied to its input to an LVDS signal. The MAX9111s translate the numerous identical LVDS signals to CMOS levels.
Figure 2. The MAX9150 repeater distributes an LVDS signal received at its input to as many as ten locations. The MAX9110 translates the CMOS signal applied to its input to an LVDS signal. The MAX9111s translate the numerous identical LVDS signals to CMOS levels.

The MAX9150's input accepts differential signals with amplitudes as low as 100mV and as high as 1V within a 0 to 2.4V input voltage range. Its outputs use a current-steering circuit to generate a 5mA to 9mA output current. The external resistive termination determines the magnitude of the differential signal swing, as the MAX9150 provides a current output. Each differential output is intended to drive 50Ω, allowing point-to-point distribution of signals on transmission lines with 100Ω terminations on each end. The device exhibits a maximum of 120ps peak-to-peak jitter (deterministic and random), which ensures reliable communication on high-speed links that are sensitive to timing error, especially those incorporating embedded clock information. Its high-speed switching guarantees a 400Mbps data rate and less than 100ps skew between channels. The MAX9150 operates from 3.3V and consumes a maximum of 160mA at 400Mbps. A low-power shutdown mode reduces supply current to 60µA, and a fail-safe feature sets the outputs high when the input is undriven and open, terminated, or shorted.

Table 1 highlights some of the MAX9150's key parameters.

Table 1. The MAX9150's low-jitter exemplifies its excellent performance.
Parameter
Value
Differential Propagation Delay
2.2ns
Total Peak-to-Peak Jitter
20ps
Differential Output-to-Output Skew (same device)
40ps
Rise/Fall Time
220ps
Maximum Input Frequency
400Mbps minimum

Other Maxim LVDS Circuits

Table 2 below lists additional Maxim LVDS ICs. These parts can be used in conjunction with the MAX9150 or as stand-alone devices. Figure 2 depicts an example where two of these devices are used in support of the MAX9150. Here a MAX9110 translates CMOS-level signals to the LVDS levels that feed the MAX9150. At the end of the transmission line, the MAX9111 miniature SOT23 receivers translate the LVDS signals back to CMOS levels.







Table 2. Maxim offers a number of LVDS ICs, including receivers, drivers, a repeater, a crosspoint switch, and a bus serializer.
Part
Description
MAX9111/3 Single/Dual LVDS Line Receivers with Ultra-Low Pulse Skew in SOT23
MAX9110/2 Single/Dual LVDS Line Drivers with Ultra-Low Pulse Skew in SOT23
MAX9150 Low-Jitter, 10-Port LVDS Repeater
MAX9115 Single LVDS Line Receiver in SC70
MAX9121/2 Quad LVDS Receivers with Flow-Through Pinout and Integrated Termination
MAX9124 Quad LVDS Line Driver
MAX9125/6 Quad LVDS Line Receivers with Integrated Termination
MAX9152 800Mbps LVDS/LVPECL to LVDS Crosspoint Switch
MAX9205/7 Bus LVDS Serializers

Conclusion

When signaling speeds break well into the tens and hundreds of MHz, LVDS devices are often a better choice for accomplishing that signaling than TTL. Its differential nature increases its immunity to common-mode noise and reduces the noise it generates. It also typically consumes less power than other signaling systems such as ECL and CML; however, the amount of power consumed often depends on the termination techniques used. Integrated circuits based on LVDS technology are useful in many applications, including the distribution of clock and serial data signals at speeds of up to 400Mbps and higher. The specific Maxim devices shown here distribute those signals with low-jitter, while creating little noise and while consuming a modest amount of power. Two techniques for signal distribution were shown here: multi-drop distribution and multiple point-to-point distribution. Each technique has its advantages and disadvantages.

The MAX9150 repeater forms the heart of a high-speed data or clock distribution system shown here as an example. Other Maxim LVDS devices such as a line driver and multiple line receivers complete the system. Maxim also offers an LVDS crosspoint switch and a bus serializer.

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APP 873:
APPLICATION NOTE 873,AN873, AN 873, APP873, Appnote873, Appnote 873