Keywords: hot-swap, power, switch, protection, current, load, sharing, balance, distribution
The MAX16545 protection device can handle up to 60A of load current. To support control and protection of a +12V supply with a load current above 60A, it is necessary to combine the MAX16545 master device with one or two MAX16543 follower devices. Each MAX16543 provides an additional 30A of load-current capability, offering scaled solutions of 90A and 120A.
The balance of the load current between the two devices is not actively maintained and depends solely on the relative on-resistance of the two devices in parallel. Extraneous resistances inherent in the circuit-board construction also influence the current distribution in a predictable manner.
MAX16545 current = IM = ILOAD × RF/(RM + RF)
MAX16543 current = IF = ILOAD × RM/(RM + RF)
RM represents the on-resistance of the MAX16545, and RF represents the resistance of the MAX16543.
The board layout resistances for the MAX16545 and the MAX16543 are represented by RMCu and RFCu respectively, as shown in Figure 1.
Figure 1. Parasitic resistances with MAX16545 and MAX16543 in parallel.The equations are as follows:
MAX16545 current = IM = ILOAD × (RF +RFCu)/(RM + RF + RFCu + RMCu)
MAX16543 current = IF = IF = ILOAD × (RM +RMCu)/(RM + RF + RFCu + RMCu)
There is no active balancing or modulation of the load current. As with any parallel n-channel, MOSFET, power-switching circuit, there is some inherent balancing due to the positive temperature coefficient-of-resistance of the MOSFET switch. If one switch is carrying more current, the on-resistance increases and forces the balance to shift away from that switch, and vice versa.
Typically, the on-resistance, RM, of the MAX16545 master is about 0.9mΩ, and the on-resistance, RF, of the MAX16543 follower is about 1.5mΩ. So, the current is nominally distributed 5 parts to 3 parts (62.5% and 37.5%) between the master and follower.
Note that both silicon and copper have a positive temperature coefficient of resistance. If a path in a multi-path parallel circuit receives more current, the heat from the resistive losses raises the temperature in that path because the resistive power loss varies with the square of the current. This causes an increase in resistance and a beneficial redistribution of current away from this path.
At first glance, it might seem logical or desirable to actively control the balance of current through the devices, for example to achieve an ideal 2:1 relationship. However, to alter the balance of the load current at least one of the two devices must reduce its gate-drive voltage and, thus, increase its on-resistance (RDS,ON) to redistribute the current. This means that the overall system operates at less than maximum efficiency with no real benefit to the overall application.
Another way to think of this is that the best device must be detuned to match the worst device to perfectly balance the current between the two similar devices. This means sacrificing some performance.
This makes little sense for similar devices that have the same nominal on-resistance, and even less sense when the devices are dissimilar, as with the approximate 0.9mΩ master and 1.5mΩ follower on-resistances. Any ratio of balancing between dissimilar devices becomes arbitrary and is always fundamentally wasteful of energy.
Consider a three-leg circuit that uses one MAX16545 master device and two MAX16543 follower devices to provide 120A total current capability.
The hypothetical on-resistances of the devices in our circuit are as follows:
With simple current-divider math, the distribution at any load current is as follows:
As expected, there is a slight imbalance in current between the two MAX16543 followers. In the perfect case, the current through the two MAX6543 devices is equal, at roughly 27.3% each.
But what effect does this have on efficiency? The power loss is the product of the square of the load current and the parallel resistance of all pass-FET elements.
Plot the power-loss versus load-current for the following cases:
Figure 2 shows the power-loss for each case, plotted on the same axes. Note that the losses are highest when the follower devices are actively balanced to have the same load current.
Figure 2. Power losses with and without current-balancing.
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APPLICATION NOTE 6754,AN6754, AN 6754, APP6754, Appnote6754, Appnote 6754