Keywords: switching regulator, PCB layout, external components
The MAX77387 flash driver IC integrates a dual-phase 2A adaptive PWM step-up DC-DC converter and two high-side 1A current regulators for LED camera flash and torch applications. Its dual-phase, programmable switching frequency (1MHz/2MHz/4MHz) and automatic frequency scaling provide the flexible solution on system efficiency and total solution size. All aspects of the device for torch and flash can be controlled through an I2C interface. The IC is available in a 20-bump, 2.1mm x 1.73mm WLP package.
Efficiency, total solution size, and system cost are three main considerations when choosing the device for handheld flash applications. The MAX77387’s high efficiency (> 90%) and small total solution size make it a perfect candidate for handheld flash applications. Considering its dual-phases, high switching frequency and high current paths, careful component selection and PCB layout play very important roles to achieve high efficiency and optimize the MAX77387 performance.
Although the dual-phase switching regulator sacrifices the external component counts, it holds several big advantages over the single-phase architecture. The dual phases of switching regulators are operated out of phase. The interleaved switching doubles the effective switching frequency and significantly reduces output voltage ripple. Lower output voltage ripple produces lower output current ripple of the current regulators, resulting in lower EMI requirement for the system.
Another big advantage of dual-phase architecture is reduced total solution size: the increased external component count does not add the PCB layout size. Instead, it decreases PCB total solution size by using lower value and lower saturation current inductors. In heavy flash current cases, a traditional single-phase architecture requiring 4A input current limit and 4A inductor saturation current must use an inductor larger than 3mm x 3mm. By sharing current with dual phases, the MAX77387 replaces that bulky inductor with two 1.8mm x 1.0mm or smaller inductors to significantly reduce the total solution size.
Dual-phase switching effectively reduces the internal switch on-resistors by dual phases in parallel. Therefore, comparing with single-phase switching, its efficiency under medium and heavy current load is improved by reduced switching losses.
The MAX77387 is designed to use a 0.33µH to 1.0µH inductor per phase. Three switching frequency options (1MHz/2MHz/4MHz) allow trade-off between efficiency and solution size. Higher switching frequency allows smaller inductors at the cost of lower efficiency. Using higher inductance value increases efficiency by reducing inductor peak-to-peak current with the trade-off in solution size. To prevent core saturation and efficiency loss, ensure that the inductor-saturation current rating exceeds the peak inductor current for the application. Refer to the MAX77387 IC data sheet for suggested inductors.
Place the inductors on the top layer (same layer as the installed MAX77387). Keep the connection between the inductors and their respective LX_ node as wide and short as possible. If placing inductors away from LX_, the stray capacitances are coupled into LX nodes. The stray capacitors slow down the LX_ voltage transitions, further to reduce the converter efficiency.
Keep the LX_ traces away from other PCB noise sensitive components or traces. Minimize the LX_ area to limit the radiation noise as the LX_ nodes are radiation sources switching at high frequency. Also, minimize the switching current loop shown in Figure 2 to reduce the parasitic resistance and radiation noise.
Figure 1. Step-up regulator current loop.
Loop 1: positive terminal of the input capacitor → inductor → internal high-side switch → output capacitor → negative terminal of the input capacitor
Loop 2: positive terminal of the input capacitor → inductor → internal low-side switch → negative terminal of the input capacitor
Avoid any ground area directly below the inductor area. The inductor value decreases and the loss increases due to the eddy current in the ground layer. Avoid routing the signal lines directly under the inductor. Multilayer chip inductors with good magnetic shielding performance are recommended for use.
Ensure that the layout for each of the phases is as symmetrical as possible since the symmetry yields the best current sharing between the two phases.
Input bypass capacitors are used to reduce input ripple voltage and noise that can be fed into the MAX77387 switching regulator.
Bypass IN to AGND with a 100nF ceramic capacitor. Place it on the top layer (same layer as the installed MAX77387) as close as pos¬sible to the IN input node. This capacitor is required to ensure a low noise input to IN and is critical for MAXFLASH and adaptive regulation quality.
Place an additional 10µF capacitor from IN to PGND on the top layer (same layer as the installed MAX77387), close to the inductors (shared by both phases). It decouples the inductors to support the ripple current.
Connect input capacitor negative terminals to the inner ground plane with multiple vias that reduce the routing resistance and inductance.
The output capacitors are critical in determining the output current ripple of the current regulators. The current ripple is generated by the output capacitor voltage ripple due to the regulator switching. The output capacitors supply the load current during the low-side switch on-time. When the high-side switch turns on, the energy stored in the inductors is discharged through high-side switch to the load and the output capacitors. This causes output capacitor voltage falling and rising cycle. Select right output capacitors with low ESRs and low impedance at the switching frequency to limit output current ripple.
A 10µF 0402 size ceramic capacitor for each phase is recommended for most applications. Larger capacitors can be used if lower output voltage ripple is desired. A single output capacitor can replace 2x 10µF output capacitors to reduce the component count. Stability tests are done on 1x 10µF, 1x 22µF, 2x 10µF output capacitors when the regulator is near the dropout region. The oscillation appears in a 1x 10µF case (2x 750mA flash current, 2MHz/4MHz with frequency scaling and skip allowed), while the oscillation vanishes by replacing the 1x 10µF with 1x 22µF 0603 or 2x 10µF 0402 capacitors.
Figure 2. Oscillation with 1x 10µF output capacitor vs. stable operation and vs. unstable operation.
Bypass OUT_ to PGND_ with a ceramic capacitor. Place the capacitor as close as possible to the IC to minimize parasitic inductance. Ensure that the routing from the OUT_ bumps to the output capacitor is as similar for each phase as possible to yield the best efficiency. Ensure that OUT_A and OUT_B are routed directly to the output capacitor before routing to REG_IN. Doing this minimizes the output ripple current on the LED due to voltage ripple on the output capacitor. For enhanced performance of the current regulator, place an additional capacitor at REG_IN_. This reduces the output ripple current of the current regulator and overall enhances the performance of the current regulator.
Use a thick trace/copper pour to connect the output capacitor ground terminals to their respective power ground bumps (PGND_A/PGND_B).
Connect the output capacitor ground terminals/copper pour to the internal ground plane with multiple vias.
Figure 3. MAX77387 EV kit layout.
Figure 4. MAX77387 recommended component placement.
Good PCB grounding layout decides the system performance. Bad grounding layout can cause more noise coupling, distortion, and further deterioration to system performance.
Ground is the return path for the full load currents flowing into and out the MAX77387. It is also the common reference voltage for all the digital and analog circuits. Improper ground routing can bring extra resistance and inductance into the current loop, causing different voltage reference and worse voltage ringing or spikes.
On multilayer PCBs, one or more layers are assigned to ground planes. Carelessly mixing digital ground, analog ground, and power ground to ground planes creates problems. The most effective method to avoid any potential issues is to keep digital ground, analog ground, and power ground separate.
Create an isolated low-noise ground area/plane for the 100nF input bypass capacitor, the REG_IN capacitor (if installed), and AGND grounds. Create a continuous ground plane for digital circuits. Avoid overlapping digital signal and analog planes. The overlapping of the digital signal and analog plane causes the distributed capacitance between the overlapping to couple digital noise into the analog circuitry.
Connect all the power ground in the top layer to avoid extra inductance and resistance by vias. Connect all the digital ground, analog ground, and power ground plane together at a single point in a star ground connection. This single point is considered to be system ground potential. The battery ground terminal in a cell phone is a logic choice for the start point. Do not think that the currents flow into the ground plane and disappear; instead, all the ground currents flow back to this ground point.
Place as much ground as possible around the device to improve the thermal properties of the device.
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APPLICATION NOTE 5950,AN5950, AN 5950, APP5950, Appnote5950, Appnote 5950