Step-by-Step Design Process for the MAX16833 High-Voltage High-Brightness LED Driver, Part 2
By: Greg Fattig
This application note details a step-by-step design process for the MAX16833 high-voltage high-brightness LED driver. This process can speed up prototyping and increase the chance for first-pass success. A typical design scenario is presented, along with example calculations based on the design constraints. Component selection trade-offs are discussed. A spreadsheet calculator (XLS) is included to help calculate external component values. This application note focuses on the buck-boost converter topology. However, the same process can be applied to other topologies as long as the underlying equations are understood. For a boost converter design example, see application note 5571, “Step-by-Step Design Process for the MAX16833 High-Voltage High-Brightness LED Driver, Part 1.”
This application note is the second in a series that details a step-by-step design process for the MAX16833 high-voltage high-brightness LED driver to speed up prototyping and increase the chance for first-pass success. The MAX16833 is a peak current-mode-controlled LED driver, capable of driving an LED string in several different architectures: boost, buck-boost, SEPIC, flyback, and high-side buck topologies. The first application note in the series, application note 5571, “Step-by-Step Design Process for the MAX16833 High-Voltage High-Brightness LED Driver, Part 1,” focuses on the boost converter topology. This application note, Part 2, focuses on the buck-boost topology.
The MAX16833 offers several features: a dimming driver designed to drive an external p-channel MOSFET, extremely fast PWM current switching to the LEDs without transient overvoltage or undervoltage, analog dimming, programmable switching frequency between 100kHz and 1MHz, and the option of either a ramp output for frequency dithering or a voltage reference for precisely setting the LED current with few external components.
For the design example here in Part 2, a 4 LED string is driven with a constant current of 1A. Assume that each LED has a typical forward voltage drop of 3V and a dynamic resistance of 0.2Ω. Also assume that the LED driver circuit is running directly off of the car battery, which has a typical voltage of 12V but can vary from 6V to 16V. Since the LED string voltage is inside the input voltage range, the buck-boost configuration is chosen.
Figure 1. Typical operating circuit.
Inductor Selection (Buck-Boost)
In order to select the right inductor value, the maximum duty cycle must first be calculated:
Where VLED is the forward voltage of the LED string in volts, VD is the forward drop of the rectifying diode (approximately 0.6V), VINMIN is the minimum input-supply voltage in volts, and VFET is the average drain-to-source voltage of the switching MOSFET in volts when it is on (assume 0.2V initially).
The maximum duty cycle and LED current determine the average inductor current.
The peak inductor current is defined as follows:
Where ΔIL is the peak-to-peak inductor current ripple in amperes.
Finally, the minimum inductor value can be calculated:
Below is a numerical example based on the design problem outlined in the Introduction. Choose an inductor current ripple of 50%. Lower ripple current would require a larger (and typically more expensive) inductor. Higher ripple current requires more slope compensation and increased input capacitance.
Once the minimum inductor value has been determined, a real inductor value must be chosen that is as close to LMIN as possible without going under. Recalculate the peak inductor current and ripple using the chosen inductor value. These numbers are necessary for additional calculations going forward.
LACTUAL = 8.2µH
Ensure that the chosen inductor has a current rating higher than ILP. Typically, 20% headroom is used for inductor peak current.
Switching MOSFET Selection
Choose a switching MOSFET that is rated to withstand the maximum output voltage.
VDS = (VLED + VINMAX + VD) × 1.2
The factor of 1.2 is included for margin.
The switching MOSFET must also be rated to handle the maximum RMS current.
Where IDRMS is the switching MOSFET’s drain RMS current in amperes.
Rectifier Diode Selection
The rectifier diode can be a major contributor to overall power loss. Choose a Schottky diode with low forward voltage drop that is rated to handle the average LED current.
ID = ILAVG × (1 - DMAX) × 1.2
The factor of 1.2 is included for margin.
Also, ensure that the Schottky diode has a reverse voltage rating 20% higher than (VLED + VINMAX), the maximum expected reverse voltage across the diode.
Dimming MOSFET Selection
Select a dimming MOSFET with a continuous current rating at an operating temperature 30% higher than the LED current. The drain-to-source voltage rating of the dimming MOSFET must be 20% higher than VLED.
Input Capacitor Selection
In a buck-boost converter, the input current is continuous (assuming the output capacitor is connected to ground; see the Output Capacitor Connection section), so the RMS ripple current is low. Both bulk capacitance and ESR contribute to the input ripple. Assume equal ripple contributions from bulk capacitance and ESR if both aluminum electrolytic and ceramic capacitors are used in parallel. If only ceramic capacitors are used, most of the input ripple comes from the bulk capacitance (since ceramic capacitors have very low ESR). Use Equations 15 and 16 to calculate the minimum input bulk capacitance and maximum ESR:
Where ΔVQ_IN is the portion of input ripple due to the capacitor discharge.
Where ΔVESR_IN is the input ripple due to ESR.
Assume that a maximum of 120mV of input ripple can be tolerated (2% of VINMIN). Also, assume that 95% of this input ripple comes from the bulk capacitance. This assumption may need to be revisited if the calculated values are not easily attained with actual components. Based on the stated design specifications, the input capacitor is calculated as follows:
Use two 4.7µF capacitors in parallel to achieve the 7.5µF minimum bulk capacitance. Ensure that the chosen capacitors meet the minimum bulk capacitance requirement at the operating voltage (capacitance can decrease substantially with a change in voltage in ceramic capacitors).
Output Capacitor Selection
The purpose of the output capacitor is to reduce the output ripple and source current to the LEDs when the switching MOSFET is on. Both bulk capacitance and ESR contribute to the total output voltage ripple. If ceramic capacitors are used, a majority of the ripple comes from the bulk capacitance. Use Equation 19 to calculate the required bulk capacitance:
Where ΔVQ_OUT is the portion of output ripple due to the capacitor discharge.
The remaining ripple, ΔVESR_OUT, comes from the output capacitor ESR, which can be calculated as follows:
To determine the total allowed output ripple, multiply the allowed LED current ripple by the dynamic impedance of the LED string. The dynamic impedance of an LED is defined as ΔV/ΔI at the operating LED current and can be determined from the I-V curve in the LED data sheet. If an I-V curve is not provided in the LED data sheet, then it must be measured manually.
Use multiple ceramic capacitors in parallel to reduce the effective ESR and ESL of the bulk output capacitance.
During PWM dimming, the ceramic output capacitors might cause some audible noise. To reduce this noise, use an electrolytic or tantalum capacitor in conjunction with the ceramic capacitors to provide most of the bulk capacitance necessary. A low acoustic noise ceramic capacitor can also be used.1
Assume a maximum LED current ripple of 0.1 × ILED. Also, assume that the dynamic impedance of the chosen LED is 0.2Ω (0.8Ω total for the 4 LED string). The total output voltage ripple is then calculated as follows:
VOUTRIPPLE = 0.1A × 0.8Ω = 80mV
Assuming a ripple contribution of 95% from bulk capacitance, the output capacitor is calculated as follows:
Use three 10µF capacitors and one 4.7µF capacitor in parallel to achieve the minimum output capacitance of 30µF. Ensure that the chosen capacitors meet the minimum bulk capacitance requirement at the operating voltage (capacitance can decrease substantially with a change in voltage in ceramic capacitors).
If the LEDs are open, the converter tries to increase the output voltage to achieve the desired LED current. This means that the output voltage could approach unsafe levels. The OVP input is provided to sense an overvoltage condition and limit the output voltage. In the event that VOVP exceeds 1.23V, NDRV is forced low until VOVP discharges to 1.16V.
For a buck-boost configuration, the output voltage is equal to the input voltage plus the LED voltage. The VOV trip point chosen should be above the maximum output voltage expected during normal operation.
VOV > VINMAX + VLEDMAX
For this design example, assume that a VOV of 42V is desired. Choose ROVP2 to be 10kΩ, then
The MAX16833 is a current-mode-controlled LED driver, which means that information about the inductor current and LED current is fed back into the loop.
LED Current Sensing
The LED current is programmed by either a series high-side current-sense resistor or the voltage applied to the ICTRL input.
If VICTRL > 1.23V, the internal reference regulates the voltage across RCS_LED (VISENSE+ - VISENSE-) to 200mV. Therefore, the current-sense resistor RCS_LED sets the LED current.
If VICTRL < 1.23V, then the LED current is determined by RCS_LED and VICTRL. This allows the LEDs to be dimmed with an analog voltage.
Notice that when VICTRL = 1.23V, both equations are the same.
Switching FET Current Sensing and Slope Compensation
At duty cycles greater than 50%, a load transient can cause subharmonic oscillation and loop instability without slope compensation. To keep the loop stable, add a resistor (RSC from CS to the source of the switching MOSFET). Internal to the MAX16833, there is a current source that feeds current through RSC to create a voltage VSC. This voltage is added to the voltage across RCS_FET and the result is compared to a reference.
VCS = VSC + VCS_FET
The minimum amount of slope-compensation voltage needed to maintain stability is:
VSCMIN = 0.5 × (inductor current downslope - inductor current upslope) × RCS_FET
The FET current-sense resistor, RCS_FET, has both the switching MOSFET current and the slope compensation current flowing through it.
Figure 2. Slope compensation.
The slope-compensation voltage is defined as follows:
In order to calculate the minimum necessary slope-compensation voltage, assume the minimum supply voltage and minimum inductor value:
The factor of 1.5 is included to provide adequate margin.
Once RCS_FET has been determined, RSC can be calculated as follows:
Based on the stated design specifications, the slope compensation and current-sense resistors are calculated as follows:
The closest standard resistor value without going over is 75mΩ.
Error Amplifier Compensation
In the buck-boost configuration, the switching converter has a right-half-plane (RHP) zero that causes the loop to be unstable. The goal of loop compensation is to ensure that there is less than 180° of phase shift for loop gains > 0dB (and adequate phase margin). By adding a left-half-plane (LHP) pole, the loop gain can be rolled off to 0dB at approximately 1/5 fZRHP and the instability caused by the RHP zero can be avoided. The error amplifier must be compensated to ensure loop stability over all expected variations in operating conditions. The worst case RHP zero frequency is calculated as follows:
There is also a pole at the output of the switching converter. The output pole, fP2, can be calculated as follows:
Where COUT is the bulk output capacitance calculated above and ROUT is the effective output impedance.
Where RLED is the dynamic impedance of the LED string at the operating current in ohms.
The loop is compensated by adding a series resistor and capacitor (RCOMP and CCOMP) from COMP to SGND. RCOMP sets the crossover frequency and CCOMP sets the integrator zero frequency. For optimum performance, use the following equations:
CCOMP and the output impedance of the error amplifier set the dominant pole frequency according to the following equation:
It is assumed that ROUTEA is much greater than RCOMP. ROUTEA is not specified in the MAX16833 data sheet, but it can be calculated from the transconductance and open-loop gain of the error amplifier. First, convert the open-loop gain of 75dB from decibels to volt/volt.
Then ROUTEA can be calculated as follows:
Following the design example:
The closest standard resistor value without going under is 82Ω.
The closest standard capacitor value without going under is 0.47µF.
Loop Response and Phase Margin
We can approximate the phase margin (ΦM) as follows:
By setting the crossover frequency at 1/5 of fZRHP, setting the integrator zero (fZI) at fP2, and assuming fP1 is much less than fC, the equation simplifies to the following:
ΦM = 90° - tan-1(0.2) = 79°
Figure 3 shows a simulated Bode plot based on the above external component choices. The crossover frequency is 5.5kHz and the phase margin is 79°. The crossover frequency is slightly below the hand calculated value but well within the expected range.
Figure 3. Bode plot simulation.
Calculating and simulating the loop response are both good ideas and important steps in designing a prototype HB LED driver. However, the loop response should also be verified in the lab after the prototype has been assembled.
Use a network analyzer and a transformer to inject a small signal into the loop and measure the response. Refer to Figure 4 for a typical gain and phase measurement setup.
Figure 4. Setup for measuring the gain and phase response of the loop.
The AC signal needs to be injected into the feedback path across a small resistor and measured on both sides of the resistor. Since the design already has a 100Ω resistor in series with the ISENSE- input, there is no need to break the loop. The AC signal can be injected across the 100Ω resistor.
The loop response should be taken with full load current and no analog or PWM dimming, so make sure that PWMDIM and ICTRL are both high during the test. Also, the measurement should be performed with the minimum expected input voltage.
Check to make sure that the crossover frequency and phase margin measured by the network analyzer are close to the calculated values.
Designing a Circuit to Accommodate Multiple Applications
Often times, it is undesirable to do a new design for every application. If the differences between two applications are minimal, a system designer may choose to use the same circuit in both applications and accept the accompanying trade-offs in performance.
It is recommended that the designer evaluate and understand the behavior of their circuit under all varying conditions. These conditions include the minimum and maximum input voltage range, the minimum and maximum number of LEDs being driven, whether the cathode of the LED string is connected to GND (boost) or IN (buck-boost), etc.
Using the spreadsheet calculator (XLS) provided, it is easy to plug in the above scenarios and see which one dictates the minimum component values.
Figure 5. Generic MAX16833 solution allowing boost or buck-boost configuration.
Output Capacitor Connection
The output capacitor of the buck-boost LED driver is typically connected from the cathode of the Schottky diode to PGND. However, the output capacitor may also be connected from the cathode of the Schottky diode to VIN. Figure 6 shows both options for connecting the output capacitor of a buck-boost LED driver. Option A is the standard method and will usually provide the best EMI performance. However, because the LED cathode is connected to the input, the LED voltage is vulnerable to line-transient conditions. By connecting the output capacitor across the LEDs, the line-transient vulnerability is reduced. Option B has the drawback of changing the input current from continuous to discontinuous, increasing voltage ripple on the input and hurting EMI performance.
Figure 6. Two different options for connecting the output capacitor of a buck-boost LED driver.
The complete buck-boost LED driver schematic is shown in Figure 7. By following the step-by-step design process outlined in this application note, significant time can be saved during the debug and test phase of the project.
Figure 7. Typical application circuit based on example calculations.
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