# Designing Flyback Converters Using Peak-Current-Mode Controllers

Abstract: Flyback converter design using MAX17595/MAX17596 is outlined. Design methodology and calculations for components value selection are presented. Continuous conduction mode (CCM) and discontinuous conduction mode (DCM) are treated individually.

## Introduction

## DCM Flyback

### Primary Inductance Selection

(Eq. 1) |

_{MAX}is chosen as 0.43 for the MAX17595/MAX17596, V

_{D}is the voltage drop of the output rectifier diode on the secondary winding, and F

_{SW}is the switching frequency of the power converter. Choose the primary inductance value to be less than L

_{PRIMAX}.

### Duty Cycle Calculation

_{PRI}) can be calculated using the following equation:

(Eq. 2) |

### Turns Ratio Calculation (N_{S}/N_{P})

_{S}/N

_{P}) can be calculated as:

(Eq. 3) |

### Peak/RMS Current Calculation

Maximum primary peak current, | (Eq. 4) |

Maximum primary RMS current, | (Eq. 5) |

Maximum secondary peak current, | (Eq. 6) |

Maximum secondary RMS current, | (Eq. 7) |

I_{LIM} = I_{PRIPEAK} × 1.2 |
(Eq. 8) |

### Primary Snubber Selection

(Eq. 9) |

_{LK}is the leakage inductance that can be obtained from the transformer specifications (usually 1% to 2% of the primary inductance).

P_{SNUB} = 0.833 × L_{LK} × I_{PRIPEAK}² × F_{SW} |
(Eq. 10) |

(Eq. 11) |

V_{DSNUB} = V_{INMAX} + (2.5 × V_{OUT}/K) |
(Eq. 12) |

### Output Capacitor Selection

(Eq. 13) |

(Eq. 14) |

(Eq. 15) |

_{STEP}is the load step, T

_{RESPONSE}is the response time of the controller, ΔV

_{OUT}is the allowable output voltage deviation, and F

_{C}is the target closed-loop crossover frequency. F

_{C}is chosen to be 1/10 of the switching frequency F

_{SW}. For the flyback converter, the output capacitor supplies the load current when the main switch is on, and therefore the output voltage ripple is a function of load current and duty cycle. Use the following equation to calculate the output capacitor ripple:

(Eq. 16) |

_{OUT}is load current and DNEW is the duty cycle at minimum input voltage.

### Input Capacitor Selection

### Capacitor Selection Based on Switching Ripple (MAX17596)

_{IN_RIP}):

(Eq. 17) |

(Eq. 18) |

### Capacitor Selection Based on Rectified Line Voltage Ripple (MAX17595)

(Eq. 19) |

P

_{LOAD}= rated output power

η = typical efficiency at V

_{AC,MIN}and I

_{LOAD}

V

_{IN,PK}= √2 × V

_{AC,MIN}= peak voltage at minimum input AC voltage.

### Capacitor Selection Based on Holdup Time Requirements (MAX17595)

_{HOLDUP}) that needs to be delivered during holdup time (T

_{HOLDUP}), the DC bus voltage at which the AC supply fails (V

_{INFAIL}), and the minimum DC bus voltage at which the converter can regulate the output voltages (V

_{INMIN}), the input capacitor (C

_{IN}) is estimated as:

(Eq. 20) |

(Eq. 21) |

### External MOSFET Selection

(Eq. 22) |

### Secondary Diode Selection

V_{SECDIODE} = 1.25 × (K × V_{INMAX} + V_{OUT}) |
(Eq. 23) |

### Error Amplifier Compensation Design

**Figure 1**.

*Figure 1. Loop compensation arrangement for nonisolated designs.*

(Eq. 24) |

(Eq. 25) |

_{SW}is the switching frequency.

## CCM Flyback

### Transformer Turns Ratio Calculation (K = N_{S}/N_{P})

(Eq. 26) |

_{MAX}is the duty cycle assumed at minimum input (0.43 for the MAX17595/MAX17596).

### Primary Inductance Calculation

(Eq. 27) |

_{NOM}, the nominal duty cycle at nominal operating DC input voltage V

_{INNOM}, is given as:

(Eq. 28) |

_{D}is the forward drop of the selected output diode at maximum output current.

### Peak and RMS Current Calculation

(Eq. 29) |

(Eq. 30) |

_{PRI}is the ripple current in the primary current waveform, and is given by:

(Eq. 31) |

I_{SECPEAK} = I_{PRIPEAK}/K |
(Eq. 32) |

(Eq. 33) |

_{SEC}is the ripple current in the secondary current waveform, and is given by:

(Eq. 34) |

I_{LIM} = I_{PRIPEAK} × 1.2 |
(Eq. 35) |

### Primary RCD Snubber Selection

### Output Capacitor Selection

(Eq. 36) |

(Eq. 37) |

(Eq. 38) |

_{STEP}is the load step, T

_{RESPONSE}is the response time of the controller, ΔV

_{OUT}is the allowable output voltage deviation, and F

_{C}is the target closed-loop crossover frequency. F

_{C}is chosen to be less than 1/5 of the worst-case (lowest) RHP zero frequency F

_{RHP}. The right half-plane zero frequency is calculated as follows:

(Eq. 39) |

(Eq. 40) |

### Input Capacitor Selection (MAX17596)

_{IN_RIP}) in low-voltage DC-DC converters operating in CCM mode.

(Eq. 41) |

(Eq. 42) |

### Error Amplifier Compensation Design

(Eq. 43) |

(Eq. 44) |

(Eq. 45) |

_{Z}sets the loop-gain crossover frequency (F

_{C}, where the loop gain equals 1) equal to 1/5 the right-half plane zero frequency.

F_{C} ≤ F_{ZRHP}/5 |

(Eq. 46) |

(Eq. 47) |

## Isolated Flyback with Optocoupler Feedback

**Figure 2**.

*Figure 2. Optocoupler feedback for isolated flyback designs.*

_{FB}= 470Ω (typical), for an optocoupler transistor current of 1mA. Select R

_{1}= 49.9kΩ and R

_{2}= 22kΩ (typical values), to use the full range of available COMP voltage. U3 is a low-voltage adjustable shunt regulator with a 1.24V reference voltage. Calculate R

_{LED}using Equation 48, based on output voltage V

_{OUT}.

R_{LED} = 400 × CTR × (V_{OUT} - 2.7)Ω |
(Eq. 48) |

ƒ_{C} = 5kHz, for DCM designs |
(Eq. 49) |

Or ƒ_{C} = ƒ_{ZRHP}/10, for CCM designs, limited to ƒ_{C} = 5kHz |
(Eq. 50) |

_{C}. The open-loop gains in DCM and CCM, at ƒ

_{C}, are calculated using the following expressions.

Or ƒ_{C} = ƒ_{ZRHP}/10, for CCM designs, limited to ƒ_{C} = 5kHz |
(Eq. 50) |

, for DCM designs | (Eq. 51) |

, for CCM designs | (Eq. 52) |

K = N

_{S}/N

_{P}is the transformer turns ratio

ƒ

_{P}= I

_{OUT}/(π × V

_{OUT}× C

_{OUT}), for DCM designs

, for CCM designs |

_{LED}. For typical designs, the current transfer ratio (CTR) of the optocoupler designs can be assumed to be unity. It is known that the comparator and gate driver delays associated with the input voltage variations affects the optocoupler CTR. Depending on the optocopler selected, variations in CTR causes wide variations in bandwidth of the closed-loop system across the input-voltage operating range. It is recommended to select an optocoupler with less CTR variations across the operating range.

Configuration 1: | (Eq. 53) |

**Figure 3**.

*Figure 3. Controller configuration 1.*

Configuration 2: | (Eq. 54) |

**Figure 4**.

*Figure 4. Controller configuration 2.*

Configuration 3: | (Eq. 55) |

**Figure 5**.

*Figure 5. Controller configuration 3.*

## Bias Winding Supply Configuration

_{IN}UVLO wake-up level with 13V hysteresis to optimize the size of bias capacitor. A simple RC circuit is used to start up the MAX17595. To sustain the operation of the circuit, the input supply to the IC is bootstrapped through diode D2 as shown in

**Figure 6**(refer to the MAX17595–7 data sheet to design the startup network).

*Figure 6. IN supply configuration for an offline isolated design.*

### Turns Ratio Calculation (N_{B}/N_{P})

_{B}= N

_{B}/N

_{P}) can be calculated as follows:

(Eq. 56) |

### Bias Capacitor (C_{START}) Calculation

_{START}can be calculated as follows:

C_{START} = 0.75 × (C_{DRV} + 0.1 × I_{IN} × T_{SS} + 0.04 × T_{SS} × Q_{G} × F_{SW}) |
(Eq. 57) |

### Feedback Potential Divider Selection (R_{U}, R_{B})

(Eq. 58) |

(Eq. 59) |

_{REF}is the reference set by the secondary side controller (e.g., V

_{REF}= 1.24V for TLV431)

_{START}is the startup capacitor, C

_{DRV}is the cumulative capacitor used at the DRV pin, I

_{IN}is the MAX17595 quiescent current, T

_{SS}is the soft-start time, V

_{OUT}is the output voltage, C

_{OUT}is the output capacitor used, and Q

_{G}is the gate charge of the primary n-channel MOSFET.

**Figure 7**. Using the input supply directly for the IC eliminates the external RC startup network and bias winding circuit. The MAX17596 is optimized for such low-voltage DC-DC applications with UVLO V

_{IN}wake-up level of 4.1V (typ) with 200mV hysteresis. In such applications where bias winding is not used, the feedback potential divider may be chosen as follows:

_{B}= 10kΩ (typ)

(Eq. 60) |

*Figure 7. The IN supply configuration for low-voltage isolated DC-DC designs.*

## Typical Operating Circuit

## Design Calculations for the MAX17595-Based Isolated DCM Flyback Converter

### Technical Specifications

**Input voltage range**: 85VAC to 265VAC

**Output voltage**: 15V

**Rated output current**: 1.5A

**Switching frequency**: 120kHz

**Operating mode**: Discontinuous Conduction Mode (DCM)

**Primary inductance selection**

In offline applications, the DC bus voltage varies from 120VDC to 375VDC. But the actual minimum input operating voltage depends on the 100Hz ripple present on the DC bus capacitor. In this application, the ripple is assumed to be 30V and hence the minimum DC input to the converter is 90V.**Maximum duty cycle calculation with selected L**_{PRI}**Turns ratio calculation (K = N**_{S}/N_{P})**Peak/RMS current calculation****Primary snubber selection****Output capacitor selection****Input capacitor selection based on 100Hz ripple on DC bus voltage****External MOSFET selection****Secondary diode selection****Bias winding supply configuration****Output-voltage soft-start time calculation****Bias turns ratio selection (K**_{B}= N_{B}/N_{P})**Startup capacitor selection****Feedback potential divider selection****Isolated flyback with opto-isolated feedback compensation design**

_{INMIN}= 90V, D

_{MAX}= 0.43, V

_{D}= 0.8V

**L**to account for 10% tolerance on primary inductance.

_{PRI}= 190µH_{LK}= 1.9µH (1% of L

_{PRI})

_{10}= 3.3nF.

P_{R18} = 0.833 × L_{LK} × I_{PRIPEAK}² × F_{SW} = 0.47W |

_{C}= 5kHz, typical bandwidth at nominal voltage for isolated applications

_{STEP}= 0.25 × I

_{OUT}= 0.375A (25% of I

_{LOAD}, typical for isolated applications)

_{OUT}= 450mV (3% of V

_{OUT}, typical)

**C**(with 22µF/25V × 4 capacitors after derating)

_{13,14,15,16}= 30µF**Note**: Capacitor values change with temperature and applied voltage. Refer to capacitor data sheets to select capacitors that guarantee the required output capacitance across the operating range. For design calculations, use the worst-case derated value of capacitance, based on temperature range and applied voltage.

_{LOAD}= 15 × 1.5 = 22.5W

_{IN,PK}= √2 × 85 = 120V

_{D4}= 1.25 × (K × V

_{INMAX}+ V

_{OUT}) = 140V

_{BIAS}= 12V, V

_{D2}= 0.8V, V

_{D1}= 0.8V, K = 0.24, C

_{DRV}= 1µF, I

_{IN}= 2mA, Q

_{G}= 35nC (STB11NM80), R1 = 49.9kΩ, R2 = 22kΩ for the following calculations.

_{SS}= 12ms (refer to the MAX17595/MAX17596/MAX17597 data sheet for programming soft-start time).

_{SS}, R1, and R2 and can be calculated as follows:

**Note**: The above equation provides an approximate output-voltage soft-start time. Due to the presence of the optocircuit, the actual soft-start may be different from the programmed soft-start time. It is recommended to adjust the soft-start capacitor to get the required soft-start time.

_{9}= 0.75 × (C

_{DVR}+ 0.1 × I

_{IN}× T

_{SS}+ 0.04 × T

_{SS}× Q

_{G}× F

_{SW}) = 4µF

**Note**: Usually the bias voltage is in the range of 12V to 20V, so it is suggested to consider the derating of the startup capacitor. Improper selection of the C

_{START}, R

_{L}, and R

_{U}may result in an unnecessary power up sequence if IN supply falls below the UVLO lower threshold during circuit operation.

_{29}= 221Ω

_{IN}= 325VDC, R1 = 49.9kΩ, R2 = 22kΩ, R

_{FB}= 470Ω, CTR = 1 (all typical values)

_{CS}= 0.2Ω

_{26}= 400 × CTR × (V

_{OUT}- 2.7)Ω = 4.9kΩ

_{C}= 5kHz (typical, at nominal input voltage of 325VDC)

**1.2**, the third configuration shown in the isolated compensation design should be used for this application.

_{17}= 68nF

_{4}= 56pF

Bill of Materials | ||

Designation | Qty | Description |

C1 | 1 | 0.1µF 20% 275VAC X2 plastic film capacitor (17mm x 5mm) Panasonic ECQ-U2A104ML |

C4 | 1 | 56pF 5% 50V C0G ceramic capacitor (0603) Murata GRM1885C1H560J |

C5 | 1 | 100µF 20% 450V aluminium electrolytic capacitor (25mm diameter) Panasonic ECO-S2GP101CA |

C6, C21 | 2 | 0.47µF 10% 25V X7R ceramic capacitors (0603) Murata GRM188R71E474K |

C7 | 1 | 0.1µF 10% 16V X7R ceramic capacitor (0603) Murata GRM188R71C104K |

C8 | 1 | 1µF 10% 25V X7R ceramic capacitor (0603) Murata GRM188R71E105K |

C9 | 1 | 4.7µF 10% 50V X7R ceramic capacitor (1206) Murata GRM31CR71H475K |

C_{10} |
1 | 3300pF 10% 250V X7R ceramic capacitor (0805) Murata GRM21AR72E332K |

C11 | 1 | 1000pF 10% 50V X7R ceramic capacitor (0603) Murata GRM188R71H102K |

C13, C14, C15, C16 | 4 | 22µF 10% 25V X7R ceramic capacitors (1210) Murata GRM32ER71E226K |

C17 | 1 | 68nF 10% 50V X7R ceramic capacitor (0603) TDK C1608X7R1H683K |

D1 | 1 | 600V 1.5A bridge rectifier (DF-S) Diodes Inc. DF1506S |

D2 | 1 | 100V 300mA fast switching diode (SOD-123) Diodes Inc. 1N4148W-7-F |

D3 | 1 | 800V 1A ultra-fast rectifier (SMA) Diodes Inc. US1K-TP |

D4 | 1 | 200V 6A ultra-fast recovery rectifier (PowerDI 5) Diodes Inc. PDU620-13 |

L1 | 1 | 6.8mH 0.8A line filter (13mm x 10mm) Panasonic® ELF15N008A |

N1 | 1 | 800V 11A N-channel MOSFET (D2PAK) ST Micro STB11NM80T4 |

R1 | 1 | 10Ω 2A NTC thermistor (5mm) EPCOS B57153S0100M000 |

R2, R3, R4 | 3 | 549kΩ 1% resistors (1206) |

R5 | 1 | 19.8kΩ 1% resistor (0603) |

R6 | 1 | 4.99kΩ 1% resistor (0603) |

R9 | 1 | 82.5kΩ 1% resistor (0603) |

R12 | 1 | 49.9kΩ 1% resistor (0603) |

R13 | 1 | 22kΩ 1% resistor (0603) |

R14, R15, R16 | 3 | 402kΩ 1% resistors (1206) |

R18 | 2 | 100kΩ 5% resistors (1206) Panasonic ERJ-P08J104V |

R19 | 1 | 10Ω 1% resistor (0603) |

R20 | 1 | 100Ω 1% resistor (0603) |

R21 | 1 | 0.2Ω 1% resistor (1206) Panasonic ERJ-8BSFR20V |

R22 | 1 | 470Ω 1% resistor (0603) |

R26 | 1 | 4.99kΩ 1% resistor (0603) |

R28 | 1 | 2.49kΩ 1% resistor (0603) |

R29 | 1 | 221Ω 1% resistor (0603) |

T1 | 1 | 180µH, 0.8A, 1:0.24:0.2 transformer (EFD25) Coilcraft® MA5475-AL |

U1 | 1 | Peak-current-mode controller for flyback regulator (16-TQFN 3mm x 3mm x 0.8mm) Maxim MAX17595ATE+ |

U2 | 1 | Phototransistor (6-DIP) Avago™ 4N35-300E |

U3 | 1 | Shunt regulator 1.24V 0.5% (SOT-23-3) Diodes Inc. TLV431BFTA |