APPLICATION NOTE 5503

Abstract: This application note describes how to design boost converters using the MAX17597 and MAX17498B/C peak-current-mode controllers. Boost converters can be operated in discontinuous conduction mode (DCM) or continuous conduction mode (CCM). The operating mode can affect the component choices, stress level in power devices, and controller design. Formulas for calculating component values and ratings are presented.

Typical boost converter circuit schematics, built around the MAX17597 and MAX17498B/C peak-current-mode controllers, are shown in **Figure 1** and **Figure 2**, respectively. Input capacitors C1 and C2, inductor L_{IN}, MOSFET N1(internal for MAX17498B/C), diode D1, and output capacitor C8 form the main components for power conversion. C3 decides the soft-start duration. C4 decouples V_{DRV} or V_{CC} output voltage (set to 4.9V by the internal regulators). R1 programs the slope compensation, which is necessary to provide internal stability in peak-current-control scheme. R2 and R3 form the potential divider for output voltage feedback. The network R4, C5, C6 forms the closed-loop compensation network. The resistor network R5, R6, R7 sets the input enable and overvoltage threshold levels. R8 sets the switching frequency in the case of the MAX17597. The MAX17498B switches at 500kHz fixed switching frequency and MAX17498C switches at 250kHz. R_{CS} senses the current in MOSFET N1 for the MAX17597 and R_{cs} = 0.5Ω for the MAX17498B/C, and filter components R9 and C7 provide leading-edge filtering of the sensed current signal, which is not required for the MAX17498B/C. R_{LIM} is the current-limit resistor required for the MAX17498B/C. R_{GOOD} and C_{Ref} components are required for PGOOD signal and reference voltage, respectively.

*Figure 1. Typical application circuit for MAX17597.*

*Figure 2. Typical application circuit for MAX17498B/C.*

In a DCM boost converter, the inductor current returns to zero in every switching cycle. Energy stored during the ON time of the main switch, MOSFET N1 in the case of the MAX17597, is entirely depleted within the switching cycle.

The design procedure starts with calculating the boost converter's input inductor (L_{IN}), such that it operates in DCM at all operating input voltage and load current conditions. The critical inductance required to maintain DCM operation is calculated as:

L_{IN} ≤ [((V_{OUT} - V_{INMIN}) × V_{INMIN}²) × η]/(2 × I_{OUT} × V_{OUT}² × f_{SW}) henry |
(Eq. 1) |

where V_{INMIN} is the minimum input voltage, V_{OUT} is the desired output voltage, I_{OUT} is the load current specification, and f_{SW} is the chosen switching frequency for MAX17597, f_{SW} = 250kHz for MAX17498C and f_{SW} = 500kHz for MAX17498B. η is expected efficiency in the range of 70% to 95% based on specifications. Practical L_{IN} choice shall take into account tolerances and saturation effects.

For the purpose of setting the current limit, the peak current in the inductor can be calculated as:

in amperes | (Eq. 2) |

The value of current limit, in MOSFET N1, is set as:

I_{LIM} = I_{PK} × 1.2 in amperes |
(Eq. 3) |

In the case of the MAX17597, the current-sense resistor (R_{CS}), connected between the source of MOSFET N1 and PGND, sets the peak current limit. The current-limit comparator has a voltage trip level (V_{CS-PEAK}) of 300mV. Use the following equation to calculate the maximum value of R_{CS}:

R_{CS} = (300mV/I_{LIM})Ω

In the case of the MAX17498B/C the R_{LIM} sets the current-limit value and its minimum value is:

R_{LIM} = I_{LIM} × 50 in kΩ (Note that the worst-case I_{LIM} is 1.62A for the MAX17498B/C)

The output capacitance (C8) can be calculated as follows:

C_{OUT} = 1/2 × (I_{STEP} × T_{RESPONSE})/ΔV_{OUT} in farads |
(Eq. 4) |

Where T_{RESPONSE} = (0.33/F_{C} + 1/F_{SW}) is the response time of the controller.

I_{STEP} is the load step expected at the output of boost converter, ΔV_{OUT} is the allowable output voltage deviation for the expected load step, and f_{C} is the target closed-loop crossover frequency. f_{C} is chosen to be in the order of 1/10 of the switching frequency f_{SW}. For the boost converter, the output capacitor supplies the load current when the main switch is ON, and therefore the output voltage ripple is a function of duty cycle and load current. Use the following equation to calculate the steady state output voltage ripple:

ΔV_{OUT} = (I_{OUT} × L_{IN} × I_{PK})/(V_{INMIN} × C_{OUT}) in volts |
(Eq. 5) |

The minimum required input ceramic capacitor (C2) can be calculated based on the ripple allowed on the input DC bus.

C_{IN} = I_{PK}/(ΔV_{IN} × F_{SW}× 8) |
(Eq. 6) |

Where ΔV_{IN} is the ripple voltage allowed on the input DC bus.

In practice, an electrolytic capacitor (C1) is provided to decouple any source inductance formed by the input cables. The electrolytic capacitor, C1, may also be used as an energy storage element, which can supply power when input power fails.

Capacitor values change with temperature and applied voltage. Refer to capacitor data sheets to select capacitors that would guarantee the required C_{IN} and C_{OUT} values across the operating range. Use the worst-case derated value of capacitance, based on temperature range and applied voltage, for further calculations.

The loop compensation values for the error amplifier are calculated as (for R4, C5, and C6):

(Eq. 7) |

where

(Eq. 8) |

m_{S} is the programmed slope (with default minimum slope = 50mV/µs for the MAX17597 and is 60mV/µs for the MAX17498B/C), and m_{P} = V_{INMIN}/L × R_{CS} (R_{cs} = 0.5Ω for MAX17498B/C).

C_{5} = 1/(2π × f_{P} × R_{4}) |
(Eq. 9) |

C_{6} = 1/(π × f_{SW} × R_{4}) |
(Eq. 10) |

In theory, a DCM boost converter does not require slope compensation for stable operation. In practice the converter needs a minimum amount of slope for good noise immunity at very light loads. The minimum slope is set for the MAX17597 by allowing the SLOPE pin to float. The minimum slope compensation ramp is set to 50mV/µs for MAX17597 and 60mV/µs for MAX17498B/C, when the SLOPE pin is left to float.

The voltage rating of the output diode (D1 of Figure 1) for a boost converter, ideally, equals the output voltage. In practice, parasitic inductances and capacitances in circuit layout and components interact to produce voltage overshoot during the turn-off transition of the diode, which occurs when the main switch Q1 turns ON. The diode voltage rating should, therefore, be selected with necessary margin to accommodate extra voltage stress. A voltage rating of 1.3 × V_{OUT} provides the necessary design margin in most cases.

The current rating of the output diode is chosen to minimize the power loss in the component. The average power loss is given by the product of forward voltage drop and average diode current. Minimizing the power loss in the diode at its peak current level (I_{PK}) gives the least dissipation in the component. Choose a diode with minimum voltage drop at I_{PK}. Select fast recovery diodes with a recovery time of less than 50ns or Schottky diodes, with low junction capacitance.

The voltage stress on the MOSFET N1 ideally equals the sum of the output voltage and the forward drop of the output diode. In practice, voltage overshoot and ringing occur due to action of circuit parasitic elements during the turn off of N1. The MOSFET voltage rating should be selected with necessary margin to accommodate this extra voltage stress. A voltage rating of 1.3 × V_{OUT} provides the necessary design margin in most practical cases. The RMS current in the MOSFET is useful in estimating the conduction loss, and is given as:

(Eq. 11) |

where I_{PK} is the peak current calculated at the lowest operating input voltage, V_{INMIN}.

MAX17498B/C has an internal MOSFET, the RMS current for the internal MOSFET can be calculated using the above formula.

In a CCM boost converter, the inductor current does not return to zero during a switching cycle. Since the MAX17597 and MAX17498B/C implement a nonsynchronous boost converter, the inductor current will enter DCM operation at load currents below a critical value, equal to half of the peak-to-peak ripple in the inductor current.

The design procedure for CCM boost starts with calculating the boost converter's input inductor at minimum input voltage. The inductor ripple current (LIR) can be chosen between 30% and 60% of the maximum input current.

L_{IN} = (V_{INMIN} × D_{MAX} × (1 - D_{MAX}))/(LIR × I_{OUT} × F_{SW}) |
(Eq. 12) |

where LIR is the chosen inductor ripple ratio (expressed in per unit) and D_{MAX}, the duty cycle is calculated as:

D_{MAX} = (V_{OUT} + V_{D} - V_{INMIN})/(V_{OUT} + V_{D}) |
(Eq. 13) |

V_{D} is the voltage drop across the output diode of the boost converter at maximum output current.

For the purposes of setting current limit, the peak current in the inductor and MOSFET can be calculated as follows:

I_{PK} = [(V_{OUT} × D_{MAX} × (1 - D_{MAX}))/(L_{IN} × F_{SW}) + (I_{OUT}/(1 - D_{MAX}))] for D_{MAX} < 0.5 |
(Eq. 14) |

for D_{MAX} ≥ 0.5 |
(Eq. 15) |

The value of current limit, in MOSFET N1, is set as:

I_{LIM} = I_{PK} × 1.2 |
(Eq. 16) |

In the case of the MAX17597, the current-sense resistor (R_{CS}), connected between the source of the MOSFET N1 and PGND, sets the peak current limit. The current-limit comparator has a voltage trip level (V_{CS-PEAK}) of 300mV. Use the following equation to calculate the maximum value of R_{CS}:

R_{CS} = (300mV/I_{LIM})Ω |
(Eq. 17) |

In the case of the MAX17498B/C the RLIM sets the current-limit value and its minimum value is:

R_{LIM} = I_{LIM} × 50 in kΩ (Note that the worst-case I_{LIM} is 1.62A for the MAX17498B/C) |

The output capacitance may be calculated as follows:

C_{OUT} = 1/2 [(I_{STEP} × T_{RESPONSE})/ΔV_{OUT}] |
(Eq. 18) |

T_{RESPONSE} (0.33/F_{C}) + (1/F_{SW}) |
(Eq. 19) |

where I_{STEP} is the load step, t_{RESPONSE} is the response time of the controller, ΔV_{OUT} is the allowable output voltage deviation, and f_{C} is the target closed-loop crossover frequency. f_{C} is chosen in the range of 1/10 to 1/5 RHP Zero.

f_{RHP,Zero} = (V_{OUT} × (1 - D_{MAX})^{2})/(I_{OUT} × 2 × π × L_{IN}) |

For a boost converter, the output capacitor supplies the load current when the main switch is ON, and therefore the output voltage ripple is a function of duty cycle and load current. Use the following equation to calculate the output capacitor steady-state ripple voltage:

ΔV_{COUT} = (I_{OUT} × D_{MAX})/(C_{OUT} × F_{SW}) |
(Eq. 20) |

The minimum required input ceramic capacitor (C2) can be calculated based on the ripple allowed on the input DC bus.

C_{IN} = [(LIR × I_{OUT})/(8 × ΔV_{IN} × f_{SW} × (1 - D_{MAX})] |
(Eq. 21) |

Where ΔV_{IN} is the ripple voltage allowed on input DC bus.

In practice, an electrolytic capacitor (C1 of Figure 1) is provided to decouple any source inductance formed by the input cables. The electrolytic capacitor, C1, may also be used as an energy storage element, which can supply power when input power fails.

Capacitor values change with temperature and applied voltage. Refer to capacitor data sheets to select capacitors that would guarantee the required C_{IN} and C_{OUT} values across the operating range. Use the worst case derated value of capacitance, based on temperature range and applied voltage, for further calculations.

The loop compensation values for the error amplifier may now be calculated as (for R4, C5, and C6):

R_{4} = (182 × V_{OUT}² × C_{OUT} × (1 - D_{MIN}) × R_{CS})/(I_{OUT} × L_{IN}) for MAX17597 |
(Eq. 22) |

R_{4} = (46 × V_{OUT}² × C_{OUT} × (1 - D_{MIN}))/(I_{OUT} × L_{IN}) for MAX17498B/C |
(Eq. 23) |

where D_{MIN} is the duty cycle at the highest operating input voltage, given by the following expression.

D_{MIN} = (V_{OUT} + V_{D} - V_{INMAX})/(V_{OUT} + V_{D}) |
(Eq. 24) |

C_{5} = (V_{OUT} × C_{OUT})/(2 × I_{OUT} × R_{4}) |
(Eq. 25) |

C_{6} = 1/(π × F_{SW} × R_{4}) |
(Eq. 26) |

The slope required to stabilize the converter at duty cycles greater than 50% can be calculated as follows:

S_{e} = ((0.82 × (V_{OUT} - V_{INMIN}) × R_{CS})/L_{IN})V/µs |
(Eq. 27) |

R_{cs} = 0.5Ω for MAX1498B/C

where L_{IN} is in µH. Refer to the MAX17597 or MAX1498B/C data sheet to set the R1 value for the required slope S_{e}.

The design procedure for output-diode selection is identical to that outlined in the DCM Boost section.

The voltage stress on the MOSFET ideally equals the sum of the output voltage and the forward drop of the output diode. In practice, voltage overshoot and ringing occur due to action of circuit parasitic elements during the turn-off transition. The MOSFET voltage rating should be selected with the necessary margin to accommodate this extra voltage stress. A voltage rating of 1.3 × V_{OUT} provides the necessary design margin in most cases. The RMS current in the MOSFET is useful in estimating the conduction loss, and is given as:

I_{MOSFETRMS} = (I_{OUT} × √D_{MAX})/(1 - D_{MAX}) |
(Eq. 28) |

where D_{MAX} is the duty cycle at the lowest operating input voltage, and I_{OUT} is the maximum load current. MAX17498B/C has an internal MOSFET, the RMS current for the internal MOSFET can be calculated using the above formula.

R2 and R3 of Figure 1 form the output voltage feedback network. Choose R2 = 10kΩ. Based on R2, calculate R3 as:

R_{3} = R_{2} × (V_{OUT}/1.21 - 1)kΩ |
(Eq. 29) |

Refer to the MAX17597 or MAX1498B/C data sheet to program the soft-start duration, EN/UVLO, and OVI potential divider and switching frequency.