APPLICATION NOTE 4944

Layout Guidelines Maximize Automotive Power-Supply Performance and Minimize Emissions

By: Jon Wallace

Abstract: When using a high-frequency switching regulator, a good PCB layout for an automotive power supply will provide a clean output supply and save time debugging emissions issues in the electromagnetic interference (EMI) chamber. This application note explains how to layout the MAX16903/MAX16904 switching regulators to maximize performance and minimize emissions.

A similar version of this article appeared on Jan. 19, 2012 in John Day's Automotive Electronics News.

Introduction

When using a high-frequency switching regulator such as the MAX16903/MAX16904, a good PCB layout for an automotive power supply will provide a clean output supply and save time debugging emissions issues in the electromagnetic interference (EMI) chamber. This application note outlines some critical design issues of the circuit where optimizing the layout provides the most benefit, using the MAX16903 and MAX16904 as examples.

General Layout Guidelines

  1. Minimize the trace loop area for the input capacitor (C3), inductor (L1), and output capacitor (C2).
  2. Place the BIAS output capacitor (C4) as close to pin 13 (BIAS) and pin 14 (GND) as possible without any vias between the pins and the capacitor. This is the analog supply for the IC; any inductance on this connection will increase noise on the BIAS supply which can, in turn, increase jitter on the LX output.
  3. A shorter trace is better than a wider trace.

Optimizing the AC-DC Current Path

To minimize emissions, the layout on the passive components of the MAX16903/MAX16904 is critical. The paths where there are current-step changes are considered the AC-current paths and they can be seen by eliminating the paths where current flows on both the ON and OFF parts of the switching cycle. The paths that have current flowing through them during the ON and OFF cycles are considered the DC-current paths.

AC-Current Path

The MAX16903 synchronous DC-DC converter has three passive components (C2, C3, and L1) directly in the switching current path. These three components have the most impact on emissions and device performance. Figures 1 and 2 show the switching current path during the ON and OFF cycles; Figure 3 shows the difference between these two current paths where the highest di/dt occurs. Optimizing the layout of component C3 is the highest priority, followed by optimizing for L1 and C2.
Figure 1. OUT2 current flow with PMOS on.
Figure 1. OUT2 current flow with PMOS on.
Figure 2. OUT2 current flow with DMOS on.
Figure 2. OUT2 current flow with DMOS on.
Figure 3. OUT2 AC-current flow showing difference.
Figure 3. OUT2 AC-current flow showing difference.

Boost AC-Current Path

The MAX16903/MAX16904 DC-DC converter uses a high-side DMOS device which requires a 5V supply voltage above the LX pin (the source of the DMOS). To generate this voltage a boost capacitor is connected between the LX and BST pins (Figure 4). During the OFF cycle of the DMOS, the boost capacitor (C1) is charged from the 5V BIAS regulator. The BIAS output is also used to supply the error amplifiers. It is, therefore, important that BIAS remain as quiet as possible to remove excess noise negatively influencing the error-amplifier circuitry. The best way to accomplish this is to minimize the inductance between the connection to C4 and the MAX16903/MAX16904. Consequently, place C4 as close as possible to pin 14 (GND) and pin 13 (BIAS) without adding any vias.
Figure 4. Boost capacitor AC-current flow.
Figure 4. Boost capacitor AC-current flow.

Spread Spectrum

When a good layout is not enough to pass customer-required emissions tests, the MAX16903/MAX16904 can be ordered with spread-spectrum clock enabled. The spread-spectrum-enabled device can reduce the FM-band noise by 15dB over the standard version. See the data sheet for information on how to order the spread-spectrum-enabled versions.

Example: Two-Layer PCB Layout Using TSSOP Package

Figures 5 and 6 show an example of a two-layer layout using the guidelines presented above.
Figure 5. Example of a two-layer PCB layout using a TSSOP package—top layer.
Figure 5. Example of a two-layer PCB layout using a TSSOP package—top layer.
Figure 6. Example of a two-layer PCB layout using a TSSOP package—bottom layer.
Figure 6. Example of a two-layer PCB layout using a TSSOP package—bottom layer.

Example: Two-Layer PCB Layout Using TDFN Package

Figures 7 and 8 show an example of a two-layer layout using the guidelines presented above.
Figure 7. Example of a two-layer PCB layout using a TDFN package—top layer.
Figure 7. Example of a two-layer PCB layout using a TDFN package—top layer.
Figure 8. Example of a two-layer PCB layout using a TDFN package—bottom layer.
Figure 8. Example of a two-layer PCB layout using a TDFN package—bottom layer.

Main Supply Filtering

The filtering on the main supply is also very important, as this is the last point at which conducted emissions can be reduced before exiting the module. For high-frequency switching regulators such as the MAX16903, conducted emissions issues usually occur in the FM radio band (76MHz to 108MHz). To reduce these emissions, add a ferrite bead with high impedance in this frequency range and/or an inductor with a self-resonant frequency above 108MHz.

Conclusion

Proper layout of the critical passive components for the switching regulators of the MAX16903 (Figure 9) will help to minimize the noise and emissions at the source. This will save valuable time and effort during the qualification phase of the project.
Table 1. Component List
Designation Qty Description
C1 1 0.1µF, 10V ±10% X7R 0402 ceramic capacitor
C2 1 10µF, 10V ±10% X7R 1206 ceramic capacitor
C3 1 4.7µF, 50V ±10% X7R 1210 ceramic capacitor
C4 1 2.2µF, 10V ±10% X7R 0805 ceramic capacitor
R1, R2 1 20kΩ ±1% 0402 resistors
L1 1 LPS3015-472MLB 4.7µH inductor
U1 1 MAX16903/MAX16904 Low-IQ DC-DC Converter
Figure 9. Schematic diagram used for PCB layout.
Figure 9. Schematic diagram used for PCB layout.