Designing Next-Generation Payment Terminals That Meet PCI PTS 3.x Requirements

By: Yann Loisel

Abstract: Designing enhanced yet secure payment terminals is discussed in this application note. We expose the pitfalls that manufacturers face for PCI-PED PTS certification and explain how they can be addressed and solved by the use of two-chip architecture, based on the DeepCover® Secure Microcontroller (MAXQ1850).