In a traditional three-op-amp architecture for instrumentation amplifiers, the restricted input-common-mode range limits their use in many applications. Maxim's indirect current-feedback architecture overcomes these drawbacks by extending the input common-mode voltage range to the negative rail. For more information on Maxim's indirect current-feedback architecture, see application note 4034, "Three Is a Crowd for Instrumentation Amplifiers
Recently announced parts such as the MAX4208/MAX4209
instrumentation amplifiers and the MAX9922/MAX9923
current-sense amplifiers integrate sophisticated chopper and auto-zero techniques with the indirect current-feedback architecture. These new devices deliver near zero input-offset voltages with near zero temperature drift. This high performance further enhances the devices' value for sensor and instrumentation circuits.
Advantages of a Low Input-Offset Voltage
Instrumentation amplifiers with an ultra-low input-offset voltage and drift are ideal for sensor-interface applications that need to amplify small sensor signals, while rejecting common-mode noise.
Current-sense amplifiers with an extremely low input-offset voltage allow the use of very small sense voltages for current-monitoring and power-management applications. The small sense voltages improve power conversion efficiencies and reduce board layout space because the parts allow the use of smaller low-wattage sense resistors that do need extensive PCB heat sinking.
Both instrumentation amplifiers and current-sense amplifiers typically need to offset their output voltages above ground, either to handle bipolar input-differential signals or to overcome the VOL (output voltage low) specification limitations of the amplifier's output stage.
Traditional Differential Amplifiers Require a REF Buffer
Traditional three-op-amp instrumentation amplifier architectures rely on an output differential amplifier to reject input common-mode voltages. The effectiveness of this technique greatly depends on the matching of differential amplifier resistors. To maintain the resistor matching, the designs require an external op amp to drive the REF pin. If a resistor string is used to create this output-offset voltage, then a mismatch in the differential amplifier resistor network is introduced, and its common-mode rejection will be severely degraded.
shows the REF pin of the MAX4194
instrumentation amplifier connected to a resistor-divider, R3. In this design R3's Thévenin equivalent (R3/2) is added in series with the R2 resistor connected to the REF pin. This creates a mismatch in resistors around amplifier A3, and affects both the common-mode rejection and gain error of the instrumentation amplifier.
In addition, the use of an external precision op amp to drive the REF pin adds cost, board space, and supply current to the end application.
Figure 1. Connecting a resistor-divider (R3) to the REF pin of a three-op-amp instrumentation amplifier (such as the MAX4194–MAX4197) degrades its CMRR.
Indirect Current-Feedback Architecture Does Not Always Need a REF Buffer
The common-mode rejection ratio of the innovative indirect current-feedback architecture is not dependent on resistor network matching because it does not contain a differential amplifier. As a result, the REF pin can be connected to a resistor-divider without affecting its common rejection.
Figure 2. Connecting a resistor-divider to the REF pin of an indirect current-feedback amplifier (such as MAX9922–MAX9923) does not degrade its CMRR.
In the indirect current-feedback architecture, the differential voltage between the FB and REF pins is made the same as the differential voltage between the RS+ and RS- pins. The current through R1 is, therefore, substantially a current source determined simply by the input-differential voltage between RS+ and RS- and the resistor R1. This current source then modulates the voltage at the REF pin as follows:
IREF = (VRS+ - VRS-)/R1 = VSENSE/R1
VREF = VDD/2 + IREF × R3/2
= VDD/2 + (VSENSE × R3)/(R1 × 2)
VOUT = (1 + R2/R1) × VSENSE + VREF
= (1 + R2/R1) × VSENSE + VDD/2 + (VSENSE × R3)/(R1 × 2)
= [1 + (R2 + R3/2)/R1] × VSENSE + VDD/2
As can be seen, instead of the expected gain of (1 + R2/R1), the new gain simply becomes (1 + (R2 + R3/2)/R1). The input common-mode rejection ratio remains equally high, as determined by the indirect current-feedback architecture.
It should be noted, however, that the tolerance of resistors used in the resistor-divider network (R3) shows up as an input-referred offset voltage. For example, with the gain = 100 and the output reference voltage = 2.5V with VDD = 5V, use of 1% resistors can cause this voltage to vary by about 1%. In fact, the output reference voltage can vary by ±25mV. Since gain = 100, this corresponds to an input offset-voltage variation of ±250µV. The input-offset voltage of the MAX4208/MAX4209 and the MAX9922/MAX9923 is much lower by comparison, and thus does not add to this variation.
Integrated Precision Buffer Drives the REF Pin
To allow applications to compensate for the variation in input-offset voltage, the MAX4208/MAX4209 integrate an internal precision buffer to drive the REF pin (Figure 3). This buffer ensures that the REF voltage is unaffected by the input sense voltage. Consequently, an ADC can read the REF voltage at all times and compensate for its nonidealities in firmware.
Figure 3. The MAX4208/MAX4209 with internal buffer.
Unipolar input-differential-voltage applications frequently tie the REF pin to GND. However, when measurements close to a zero-input signal need to be made, the VOL (output voltage low) and AOL (open-loop gain) specifications (present for all amplifier architectures) require the output voltage to be offset slightly above GND. In this scenario, the resistor-divider used to generate the REF voltage can be mismatched and sized appropriately. As an example, the use of a 1kΩ||50kΩ resistor-divider with VDD = 5V creates a ~98mV output offset voltage. In this case, use of 1% tolerance resistors causes the output-offset voltage to vary only by ±0.98mV. When input referred with gain =100, the result is an input-offset voltage of only ±9.8µV, which is comparable to the inherently low input-offset voltage of the MAX4208/MAX4209 and MAX9922/MAX9923.
Design Test Results
The test setup chose values for a sample design with the MAX9922, as shown in Figure 2:
R2 = 100kΩ
R1 = 1kΩ
REF resistor-divider = 1kΩ and 50kΩ
VDD = 5V
Actual gain = (1 + (R2 + R3/2)/R1) = 1 + (100kΩ + 1kΩ||50kΩ)/(1kΩ) = 102
Output-offset voltage = 5V × 1kΩ/(1kΩ + 50kΩ) = 98mV
VOUT = 102.17VSENSE + 96.75mV
The actual input-offset voltage (including VOS and the effect of tolerance from the 1kΩ and 50kΩ resistors) = (98mV - 96.75mV)/102.17 = 1.25mV/102.17 = 12.23µV.