APPLICATION NOTE 4266

Abstract: Techniques for calculating and predicting efficiency losses in each component of a switch-mode power supply (SMPS) are detailed. In addition, features and techniques that improve switching regulator efficiency are discussed.

To achieve maximum conversion efficiency in an SMPS, it helps to understand the elementary power-loss mechanisms in these converters, and what can be done to mitigate their effects. Additionally, familiarity with SMPS IC features that facilitate efficiency enable the engineer to make informed choices. Basic factors affecting SMPS efficiency will be explained and guidance will be provided on how to start a new design. We start with some introductory material and then move to specific switching component power losses.

Benchmark efficiencies for most power-supply ICs can be obtained by examining the typical operating characteristics found in device data sheets. In Maxim's data sheets, this data can be relied upon to be actual measured results. This should be true of any IC vendor data, but we can only vouch for our own. An example SMPS is the step-down converter circuit in

How are such high efficiency numbers realized? Understanding the fundamental losses common to all SMPSs is a great start. These losses occur mainly in the switching components (MOSFETs and diodes) and, to a usually lesser extent, in the inductors and capacitors. However, inductor and capacitor losses can be more significant when particularly low-cost (and high-resistance) components are used.

With regard to the IC, special features that combat efficiency loss, such as control-architecture options and component integration, can be selected. For example, the circuit in Figure 1 employs several loss-minimizing features, including synchronous rectification, integrated low-resistance MOSFETs, low quiescent-current consumption, and a pulse-skipping control architecture. The benefits of these will be discussed as this article unfolds.

A step-down converter's primary function is to reduce a higher DC input voltage to a lower DC output voltage. In doing so, a MOSFET is switched on and off at a constant modulation frequency (f

When the MOSFET turns off, the input supply disconnects from the inductor, and the inductor and output capacitor support the load. The magnitude of the inductor current ramps down as it flows through the diode, following the path indicated by Loop 2. The fraction of the switching period in which the MOSFET is on is defined by the duty cycle (D) of the PWM signal. D divides each switching period into [D × t

For a step-down converter, a larger duty cycle drives more energy to the load, increasing average output voltage. Conversely, average output voltage decreases as the duty cycle decreases. Due to this relationship, the idealized (not including diode or MOSFET voltage drops) conversion ratios for a step-down SMPS are:

VIt is important to note that the longer any SMPS remains in a particular interval, the greater the relative losses are that coincide with that interval. For a step-down converter, a low D (and, consequently, a low V_{OUT}= D × V_{IN}

I_{IN}= D × I_{OUT}

The MOSFET and the diode act as switches that route current through the circuit during each switching interval. Conduction loss is generated in the on-resistance of the MOSFET (R

MOSFET conduction loss (P

PThe above equation approximates MOSFET conduction loss in an SMPS, but can under-predict losses because the ramped portion of the current waveform generates more loss than would be indicated by average current. For "peakier" current waveforms, a more accurate estimate results from integrating the square of the current ramp between its peak and valley values (I_{COND(MOSFET)}(using average current) = I_{MOSFET(AVG)}² × R_{DS(ON)}× D

The following equation more accurately predicts losses for a ramped waveform by replacing the simple I² term with the integral of I² between I

Where I

P _{COND(MOSFET)}= [I _{MOSFET(AVG)}² + (I_{P}- I_{Y})²/12] × R_{DS(ON)}× D= [I _{MOSFET(AVG)}² + (I_{P}- I_{Y})²/12] × R_{DS(ON)}× V_{OUT}/V_{IN}

PWhile integrating the square of the ramp more accurately yields:_{COND(MOSFET)}(using average current) = 1² × 0.1 × 0.5 = 0.050W

Por about 18% higher than the result supplied by the average current equation. For current waveforms with a small peak-to-peak to average ratio, the difference will be less and the simpler average current calculation may be sufficient._{COND(MOSFET)}(using the integral of squared current) = [1² + (1.75 - 0.25)²/12] × 0.1 × 0.5 = 0.059W

Pwhere I_{COND(DIODE)}= I_{DIODE(ON)}× V_{F}× (1 - D)

PUnlike the MOSFET power calculation, average current provides a reasonably accurate result for a diode loss because losses are proportional to I, and not I²._{COND(DIODE)}= I_{OUT}× V_{F}× (1 - V_{OUT}/V_{IN})

It is evident that the longer a MOSFET or diode remains on during each switching interval, the larger that device's conduction loss. For a step-down converter, the lower the output voltage, the more the diode contributes to power loss, since it conducts for more of the switching interval.

A simplified plot of MOSFET drain-to-source voltage (V

As indicated in Figure 4, full load current (I

Switching loss increases as SMPS frequency is raised. This can be understood by noting that the transition periods consume a fixed amount of time, and hence a greater fraction of the total switching period as frequency increases and the switching period shrinks. A switching transition that requires only one-twentieth of the duty cycle will have less of an affect on efficiency than one that consumes one-tenth. Due to its frequency dependence, switching loss dominates conduction losses at high frequencies.

MOSFET switching loss (P

Pwhere V_{SW(MOSFET)}= 0.5 × V_{D}× I_{D}× (t_{SW(ON)}+ t_{SW(OFF)}) × f_{S}

To demonstrate MOSFET conduction and switching losses, the V

As can be seen in Figure 5, switching is not instantaneous, and current and voltage waveform overlap results in the power loss indicated in the lower waveform. Since I

Using the previously mentioned approximations, total average MOSFET loss is calculated:

This result is consistent with the average value of 117.4mW measured by the lower trace in Figure 5. Note that in this case, f

P _{TOTAL(MOSFET)}= P _{COND(MOSFET)}+ P_{SW(MOSFET)}= [I _{MOSFET(AVG)}² + (I_{P}- I_{Y})²/12] × R_{DS(ON)}× V_{OUT}/V_{IN}+ 0.5 × V_{IN}× I_{OUT}× (t_{SW(ON)}+ t_{SW(OFF)}) × f_{S}= [0.5² + (1 - 0)²/12] × 0.1 × 3.3/10 + 0.5 × 10 × 0.5 × (38 × 10 ^{-9}) × 1 × 10^{6}= 0.011 + 0.095 = 106mW

Like MOSFETs, diodes also exhibit switching loss. This loss depends to a large extent on the reverse-recovery time (t

Charge present in the diode due to forward current must be swept out of the junction as reverse voltage is applied, resulting in a current spike (I

When the reverse-recovery characteristics of the diode are known, the following equation estimates the switching power loss

Pwhere V_{SW(DIODE)}= 0.5 × V_{REVERSE}× I_{RR(PEAK)}× t_{RR2}× f_{S}

To demonstrate the diode-loss equation, Figure 7 displays the voltage and current waveforms observed for the PN switching diode in a typical step-down converter. V

This result coincides with the average power loss of 358.7mW indicated in the lower plot in Figure 7. Due to the large value of V

Several phenomena directly affect the MOSFET on-state resistance. Naturally, R

MOSFET resistance increases as die temperature increases, so it is important to keep junction temperatures cool to ensure R

MOSFET switching losses depend on the capacitances found in the device. Larger capacitances are slower to charge, causing switching transitions to last longer and to dissipate more power. Miller capacitance, commonly termed reverse-transfer capacitance (C

The charge required by the Miller capacitance is denoted Q

Diode forward voltage should be minimized, as losses due to it can be large. Forward voltage typically ranges between 0.7V to 1.5V for small, lower-rated silicon diodes. Diode process and voltage rating affect forward voltage and reverse-recovery time, with higher ratings and larger sizes typically exhibiting higher V

Schottky diodes offer virtually nonexistent recovery times and a V

However, even with a low forward-voltage drop, a Schottky diode can present unacceptable conduction losses in low-voltage applications. Consider a step-down output of 1.5V, where a typical 0.5V V

Diode losses can be mitigated by taking advantage of the low R

Another control technique that is important for designs operating with light loads, or with loads that vary over a wide range, is pulse skipping, also referred to as pulse-frequency modulation (PFM). Unlike pure PWM switching, where the regulation scheme requires a constant switching frequency regardless of heavy or light loads, pulse skipping allows the controller to skip switching cycles. This action prevents unnecessary switch operation that would ultimately reduce efficiency.

When pulses are skipped, the inductor is allowed to discharge for a longer period of time, and more energy is transferred from the inductor to the load to maintain the output voltage. Naturally, the output voltage bleeds down according to the load current draw. Once the voltage regulation threshold is reached, a new switching cycle is initiated to recharge the inductor and refresh the output voltage.

Keep in mind that pulse skipping creates output ripple that is load dependent. This makes noise more difficult to filter, since switching noise does not occur at constant intervals as with constant-frequency PWM control.

Advanced SMPS ICs often combine the benefits of constant-frequency PWM at higher loads with the enhanced efficiency of pulse skipping at light loads. The IC depicted in Figure 1 is just such a device.

As loads increase to higher active values, pulse-skipping waveforms transition to constant PWM, with noise easily being filtered during the normal operating load. The overall effect is maximum efficiency over the entire operating range, as demonstrated in the efficiency curves of a typical step-down converter with selectable pulse-skipping and PWM modes (

Curves D, E, and F in Figure 8 show efficiency falling off at lighter loads during constant PWM operation, but increasing (up to 98%) for higher loads. If set to maintain PWM operation at light loads, the IC switches whether or not the load requires it. This keeps ripple at a constant frequency, but wastes power. At higher loads, the energy penalty of maintaining PWM switching is small when compared to the load, so power losses are overshadowed by the output power. On the other hand, the pulse-skipping "idle mode" efficiency curves (A, B, and C in Figure 8) maintain efficiency even down to very light loads since switching occurs only as required by the load. For the 7V input curves, idle mode provides more than a 60% efficiency improvement at a 1mA load.

Figure 1 details the basic components in a typical IC-based step-down converter. The control IC integrates two synchronous,

DCR is defined by the following resistance equation:

where ρ is the resistivity of the wire material,

DCR increases for longer wire length and decreases for larger wire thickness. This principle can be applied to standard inductors to determine what to expect for different inductance values and case sizes. For a fixed inductance value, DCR tends to increase as inductor case size is reduced, since the cross-sectional area of the wire must decrease to fit the same number of turns. For a given inductor case size, DCR usually decreases for smaller inductances, since a smaller number of turns allows shorter, larger-gauge wire.

Knowing the DCR and the average inductor current (dependent on the SMPS topology), the inductor resistive power loss

PWhere I_{L(DCR)}= I_{L(AVG)}² × DCR

Note also that calculating P

PWhere I_{L(DCR)}= [I_{L(AVG)}² + (I_{P}- I_{Y})²/12] × DCR

Hysteresis loss stems from power expended in the realignment of core magnetic dipoles in each AC half cycle, and can be viewed as a "frictional" loss as dipoles rub against each other during magnetic field polarity changes. It is directly proportional to frequency and flux density.

Conversely, eddy current loss is introduced by the time-varying magnetic flux present in the core area. Faraday's law informs us that time-varying flux in the core produces a time-varying voltage. In turn, this varying voltage causes localized currents, which produce I²R losses dependent on core resistivity.

Core material contributes significantly to the magnitude of core loss, and several material types are available. For powder cores commonly used in SMPS inductors, molypermalloy powder (MPP) cores tend to have the lowest core loss, while iron powder cores, though low cost, usually have the highest loss.

Core loss can be estimated by calculating the peak change in flux density (B) in the core, and then consulting B (core flux) versus core loss (and frequency) plots provided by the inductor or core manufacturer, if available. Peak B can be calculated several ways, and equations are sometimes found alongside the core-loss curves in inductor data sheets.

Alternately, if the area of the core and number of windings are known, the following equation can estimate peak core flux:

where B is the peak core flux (gauss), L is the coil inductance (Henries), ΔI is the peak-to-peak inductor ripple current (amps), A is the cross-sectional core area (cm²), and N is the number of turns.

With the increased usage of the Internet for downloading data sheets and researching component information, some manufactures have made available interactive inductor power-loss software to help estimate power loss. These tools can yield a quick estimate of losses in an application circuit. For example, Coilcraft has made available an online inductor core and winding loss calculator that estimates core and copper loss for a chosen series of inductors by simply keying in a few values.

The resistive losses of the capacitor are evident. Since current flows into and out of the capacitor during each switching cycle, the intrinsic resistance (R

All three of these losses are represented in the typical loss model of a capacitor (left side of Figure 9), using resistances to depict each dissipative mechanism. The fractional power dissipation presented by each loss, in relation to the stored energy of the capacitor, is termed dissipation factor (DF), or tangent of the loss angle, δ. The DF of each loss mechanism is found by comparing the real portion of the capacitor's impedance to its imaginary part when each loss mechanism is individually inserted in the model.

For simplification of the loss model, the contact resistance, leakage, and dielectric losses of Figure 9 are lumped together into an individual real power-loss element termed "equivalent series resistance" (ESR). ESR is defined as that portion of the capacitor's impedance that is responsible for the overall real power loss in the capacitor.

In mathematically manipulating the impedance model of the capacitor, and solving for ESR (which is the real portion of the result), it is seen that ESR is frequency dependent. This dependence is demonstrated in the following simplified ESR equation:

where DF

Using this equation, it is observed that as the frequency of the applied signal increases, leakage loss and dielectric loss both shrink until contact resistance dominates at high frequencies—up to a point. Beyond this point (not indicated in the equation), ESR tends to increase for very high frequencies due to the skin effect of AC current.

Many capacitor manufacturers offer plots that characterize ESR values over frequency. For instance, TDK offers ESR curves for a majority of its capacitor products, and ESR values can be obtained by referring to these plots with switching frequency in mind.

However, if ESR plots are not available, ESR can be roughly estimated by using the total DF specification listed in capacitor data sheets. This DF is the total DF of the capacitor (including all loss elements). ESR is then estimated by:

Whichever method is used to obtain an ESR value, it is intuitive that high ESR reduces efficiency, since input and output capacitors charge and discharge AC currents through ESR during each switching cycle. This results in I² × R

Pwhere I_{CAP(ESR)}= I_{CAP(RMS)}² × ESR

IObviously, to minimize capacitor power loss, low-ESR capacitors are best. SMPSs with larger ripple currents especially benefit from low-ESR capacitors. Also, since ESR is a contributor to output-voltage ripple, selecting a low-ESR capacitor offers much more of a benefit than improved efficiency alone._{CIN(RMS)}= I_{OUT}/V_{IN}× [V_{OUT}(V_{IN}- V_{OUT})]^{1/2}

In general, different capacitor dielectric materials are characterized by certain levels of ESR. As a rule of thumb, for a given capacitance and voltage rating, aluminum electrolytic and tantalum capacitors exhibit higher ESR values than their ceramic counterparts. Polyester and polypropylene capacitor ESR usually falls in between, but these types are not commonly used in SMPSs because adequate capacitance values require too large of a case size.

For a given capacitor type, larger capacitances and lower DF offer lower ESR. Larger case sizes often reduce ESR as well, but with electrolytic types this sometimes comes at the expense of increased series inductance. Ceramic capacitors are less prone to this tradeoff. Additionally, lower capacitor voltage ratings tend to reduce ESR in a given cap case size.

A version of this application note was originally published in two parts on the

Application Note, "Equivalent Series Resistance (ESR) of Capacitors," Quadtech, Inc., www.quadtech.com.

Eichhorn, Travis, "Estimate Inductor Losses Easily in Power Supply Designs,"

Mohan, Ned; Undeland, Tore M.; and Robbins, William P.