Keywords: T3R4, TD-SCDMA, guard period, handsets
Figure 1. The T3R4 scenario in a TD-SCDMA system.
The DC-cancellation architecture in the MAX2392 is equivalent to two stages of high-pass filtering (diagram shown in Figure 2). The filter following the mixer is intended to remove DC artifacts of the mixer. The post-VGA filter cancels DC offsets generated in the VGA. The high-pass corner of these filters is 8.6kHz during normal operation, but can be set to 1MHz for fast settling.
If the high-pass filters are set to 1MHz and the LNA is disabled, saturation of the receiver can be avoided during the Tx slot. However, this is dependant on the Tx/Rx switch isolation. If the isolation of the Tx/Rx switch is not sufficiently high, a switch may be needed before the LNA to avoid Rx saturation by the Tx signal.
Figure 2. Diagram of the MAX2392 high-pass filtering stages.
When the Tx slot finishes, the LNA switches to ON in high-gain mode; the high-pass corner then reverts to 8.6kHz (nom) after the DC offsets are settled.
A control timing diagram for the T3R4 scenario using the MAX2392 is depicted in Figure 3.
Figure 3. A diagram of the T3R4 scenario's control timing using the MAX2392.
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