Add Control, Memory, Security, and Mixed-Signal Functions with a Single Contact
OverviewThe Maxim 1-Wire bus is a simple signaling scheme that performs half-duplex bidirectional communications between a host/master controller and one or more slaves sharing a common data line (Figure 1). Both power and data communication for slave devices are transmitted over this single 1-Wire line. For power delivery, slaves capture charge on an internal capacitor when the line is in a high state and then use this charge for device operation when the line is low during data transmission. A typical 1-Wire master consists of an open-drain I/O port pin and a 3V to 5V resistor pullup. More sophisticated masters, including dedicated line-driver solutions, are available from Maxim. This clever communication scheme also allows you to add memory, authentication, and mixed-signal functions at any time, easily and efficiently.
Figure 1. In a 1-Wire master/slave configuration, all devices share a common data line.
64-Bit Serial NumbersThere is an important, fundamental feature in every 1-Wire system: each slave device has a unique, unalterable (ROM), 64-bit, factory-lasered serial number (ID) that will never be repeated in another device. Besides providing a unique electronic ID to the end product, this 64-bit ID value allows the master device to select a slave device among the many that can be connected to the same bus wire. Part of the 64-bit ID is also an 8-bit family code that identifies the device type and functionality supported.
Data-Bit-Level CommunicationThe bus master initiates and controls all 1-Wire communication. As illustrated in Figure 2, the 1-Wire communication waveform is similar to pulse-width modulation, because data is transmitted by wide (logic 0) and narrow (logic 1) pulse widths during data-bit time periods or time slots. A communication sequence starts when the bus master drives a defined length "Reset" pulse that synchronizes the entire bus. Every slave responds to the Reset pulse with a logic-low "Presence" pulse. To write data, the master first initiates a time slot by driving the 1-Wire line low, and then either holds the line low (wide pulse) to transmit a logic 0 or releases the line (short pulse) to allow the bus to return to the logic 1 state. To read data, the master again initiates a time slot by driving the line with a narrow low pulse. Slaves can then either return a logic 0 by turning on the open-drain output and holding the line low to extend the pulse, or a logic 1 by leaving the open-drain output off to allow the line to recover. Most 1-Wire devices support two data rates: Standard speed of about 15kbps and Overdrive speed of about 111kbps. The protocol is self-clocking and tolerates long inter-bit delays, which ensures smooth operation in interrupted software environments.
Figure 2. This waveform example shows master-initiated write/read of data bits with slave and master sampling points.