Wideband telecommunication receiver designs invariably require a heterodyne architecture to achieve the best sensitivity performance in the presence of interferers, or blocking signals. By means of a cellular cdma2000 multicarrier receiver design example, this article discusses some of the most important parameters that influence the analog-to-digital converter (ADC) component selection—parameters such as the IF frequency, the receiver's analog power gain, the signal bandwidth, and the ADC's sample clock frequency. Through the design example, the following additional ADC parameters are discussed: full-scale (FS) power, small-signal noise floor (SSNF), signal-to-noise ratio (SNR), and spurious-free dynamic range (SFDR). The 16-bit, 80Msps MAX19586 ADC provides the lowest noise floor of any ADC available today and eliminates the need for gain-reduction techniques or automatic gain control (AGC) in the receiver design. With this superb noise performance, plus its SFDR performance, the MAX19586 meets or exceeds all the ADC requirements for such an application.
A heterodyne receiver includes a first mixer (LO1) that converts the RF waveform to a first intermediate frequency (IF) signal (Figure 1
). This IF signal can either be digitized or fed to a second mixer (LO2) to convert the desired signal to an even lower IF. Converting the signal to a lower IF frequency takes advantage of the ADC's better noise and linearity performance, which is typically achieved at lower frequency inputs. A technique known as subsampling is used to digitize the real bandpass signal at a rate that meets the Nyquist criterion for the signal's bandwidth, but not for its absolute frequency. Using this technique, an ADC digitizes the real signal, which is then converted to its complex components in the digital domain using digital signal processing (DSP) methods. Advantages to this technique include reduced hardware complexity and cost. These advantages are possible because the subsampling method performs part of the downconversion task. However, this architecture requires an ADC with higher clocking speed and larger overall dynamic range (i.e., lower noise and higher linearity). Despite the benefits that subsampling techniques provide, one important drawback is noise aliasing. Such aliasing reduces the equivalent ADC SNR performance if the input signal is not sufficiently band limited, allowing noise in the alias bands to be digitized and converted to baseband along with the desired signal.
Figure 1. Use the performance curves to determine the trade-off between ADC NF, receiver power gain, and highest blocker level for the heterodyne receiver shown.
Suppose the simplified block diagram in Figure 1 represents a typical double down-conversion receiver for a cellular base-station system where two identical receiver branches are often used for diversity reception. If LO2 is eliminated, a single downconversion implementation is achieved. Assume the ADC digitizes three contiguous cdma2000® carriers, each carrier having a bandwidth of approximately 1.23MHz. The carriers will be tuned and filtered using DSP methods following the ADC. For this example, the ADC clock rate is selected to be 64 times the cdma2000 carrier chip rate of 1.2288Msps, or 78.64Msps. For a subsampling receiver, the clock rate establishes the Nyquist bandwidth (fCLK
/2), which is an important factor when calculating the ADC's effective noise figure (NF).
For this example, assume that the target system NF is 4dB and the analog circuit NF is 3.8dB. Therefore, to meet system sensitivity in the absence of a blocker, the ADC can contribute only 0.2dB to the total system NF. Note the NF value of 4dB is significantly better than 3GPP2 cdma2000 standards require. It is representative, however, of the performance that many cellular base-station manufacturers target in order to provide margin to the minimum requirements. The plot in Figure 1 shows the combination of analog power gain and ADC NF required to meet the target system NF along with the highest in-band interferer (blocker) that can be tolerated at the antenna without the use of automatic gain control. The power gain required from the analog circuitry depends on the equivalent NF performance of the ADC, which can be calculated knowing its FS power level (in dBm), SSNF, and conversion rate.
Figure 2. Once the ADC sampling frequency and IF bandwidth are known, a graphical representation can ease the task of identifying the alias bands.
illustrates how unfiltered noise can get aliased into the desired band, thereby raising the ADC SSNF level and reducing SNR performance. In this example, three cdma2000 RF carriers are downconverted to 135MHz in a 5MHz bandwidth and applied to the ADC input. This input signal's 2nd- and 3rd-order harmonics, which are created by the ADC, can be ignored because they will not alias back into the desired band. Although this figure shows only five Nyquist bands, signal frequencies up to the 16th Nyquist band can be efficiently aliased into the band of interest, assuming the ADC full-power input bandwidth extends to 600MHz. These aliased signal frequencies will degrade the ADC noise performance if not properly attenuated.
Given that the sampling frequency is 78.64Msps and the desired IF bandwidth is 5MHz, the alias bands extending from DC to 629.12MHz (8 x fCLK
) are centered at 22.28MHz, 56.36MHz, 100.92MHz, 179.56MHz, and so on to 606.84MHz. The 3rd and 5th alias-band center frequencies are offset in frequency from the Nyquist band edge by Δf1 and Δf2, respectively. In all, there is one desired band centered at 135MHz and 15 alias bands. If noise from only one of the alias bands were to enter the ADC analog input unfiltered, the NF degradation would be 10 x log(2), or 3dB. If no noise in the alias bands were filtered, the effective NF of the ADC would theoretically degrade by 10 x log(15), or 11.8dB, assuming the ADC digitizes each of the alias frequency bands as efficiently as the desired signal.
To properly filter the noise in the alias bands, a minimum attenuation target is 16dB for the closest high-side alias band (>
177.06MHz) and for the closest low-side alias band (<
103.42MHz) to ensure that less than 0.2dB NF degradation occurs. More attenuation will, of course, produce even less ADC NF degradation.
Figure 3. The ADC requirements must be determined for two signal conditions: at sensitivity and when a large interferer (blocker) is present.
Using the same cdma2000 example, Figure 3
illustrates the required ADC performance for two conditions: a) for receiver sensitivity when no blocking signal is present, and b) for degraded receiver sensitivity in the presence of a blocking signal.
To calculate the ADC's effective NF for each of these two conditions, assume the ADC input is terminated with an equivalent 200Ω resistor and calculate the FS power level. For an FS voltage input of 2.56VP-P
, the FS power level equals +6dBm (RMS). In the blocker-absent scenario, assume the ADC SSNF to be -82dBFS and calculate the ADC noise floor level in the Nyquist bandwidth equal to -76dBm when clocked at 78.64Msps. In a 1Hz bandwidth, the noise-floor level is -152dBm; when compared to the thermal noise floor of -174dBm/Hz, the ADC effective NF is 22dB, assuming the noise spectrum is flat across all frequencies within the Nyquist bandwidth. This NF performance is very difficult to obtain with an ADC, but it can be achieved with the MAX19586.
The Figure 1 plot shows that the analog circuitry must provide 31.4dB of power gain to achieve a system NF of 4dB when the ADC's effective NF is 22dB. For this combination of specifications, the highest RMS blocker that can be tolerated without the use of automatic gain control is -27.4dBm, as shown by the power levels given in Figure 3:
FS - headroom - gain = +6dBm - 2dB - 31.4dB = -27.4dBm
In any receiver, an AGC stage is often used when a high-level blocker is present. However, reducing gain typically results in a higher overall receiver NF, thereby degrading the desired receiver sensitivity. This is especially detrimental in a multicarrier receiver when trying to detect the smallest carrier in the presence of a large blocker. If the ADC has a very low noise floor (as does the MAX19586), less gain is initially needed to achieve the required sensitivity. Thus, the receiver is able to tolerate larger blocking signals without the use of an AGC.
When an in-band blocker and the desired cdma2000 carrier are both present at the antenna, the 3GPP2 standards allow 3dB sensitivity degradation. This degradation includes the effects of increased noise and distortion from both the analog circuitry and the ADC. Suppose 1dB of the degradation is budgeted to the analog circuitry and 2dB is budgeted to the ADC. For this example, the system NF (plus distortion) increases from 4dB to 7dB and the gain remains at 31.4dB. The new NF plus distortion for the analog circuitry is 4.8dB and the ADC NF plus distortion is 34.4dB, or -139.6dBm, in a 1Hz bandwidth (Figure 3). In the Nyquist bandwidth, the equivalent noise plus distortion level is -63.6dBm.
As a first approximation, the ADC noise and spurious powers, assuming both contribute equally to the total ADC NF plus distortion, are each 3dB lower, or -66.6dBm, in the Nyquist bandwidth. Comparing this level to the blocker power of +4dBm at the ADC input results in the required SNR performance of 70.6dB. Noise power in the desired carrier bandwidth can be calculated by taking the ratio of the noise power in the cdma2000 carrier bandwidth to the noise power in the Nyquist bandwidth. In this case, noise power in the carrier bandwidth is 10 x log(1.23MHz / 39.32MHz), or -15dB, lower than -66.6dBm (i.e., -81.6dBm). Because the noise and distortion power are assumed equal, the spur power is also -81.6dBm, resulting in the ADC SFDR performance (-85.6dB) illustrated in Figure 3.
In conclusion, this article describes some of the most important system-level parameters in a subsampling receiver and illustrates the methods needed to determine the required ADC full-scale power level, SSNF, SNR, and SFDR. The MAX19586 ADC is an excellent choice for this receiver design.
A similar version of this application note appeared in the October 2005 edition of Electronic Products