A similar version of this application note appeared in the January 2006 issue of Microwaves and RF
Power Amplifier Overview
Class A, B, and C Amplifiers
A class A amplifier is characterized by a combination of bias point and signal level where the device's average current drain does not change with the magnitude of the input signal. In Figure 1
, M1 can be assumed to be a current source of magnitude IDC.
Figure 1. Schematic diagram of a class A amplifier.
It is well known that the impedance for maximum output power is:
The maximum output power is defined as:
|POUTMAX = ½ × VDD × IDC
Therefore, the peak efficiency is 50%.1
This analysis assumes that the drain voltage of M1 can swing to ground while still maintaining a bias current of IDC. Operation in the triode region limits the practical efficiency of class A CMOS PAs to less than 40%. As this analysis implies, the bias current of a class A amplifier must be changed to maintain a reasonably high efficiency for different output-power levels for a given supply voltage. Class A amplifiers are most amenable to modulation schemes where linear amplification of the input signal is important, since the bias point does not change with the magnitude of the input signal.
Class B and class C amplifiers, however, offer higher efficiencies than the class A amplifier, but usually at reduced output-power levels and with more distortion.
The common characteristic of all class A, B, and C CMOS amplifiers is that the active device is considered to be a voltage-controlled current source and operation in the triode region is undesirable.
Class D, E, and F Amplifiers
In contrast to Class A, B and C amplifiers where operation in the triode region should be avoided, the class D, E, and F CMOS amplifiers rely on operation in the triode region for optimum efficiency and output power. These amplifiers are often called 'switching-mode' amplifiers and are typically used in ISM-band transmitters and transceivers because of their inherent high-efficiency operation at low voltages. In a switching-mode amplifier, the output device is driven by a large-signal square wave, as shown in Figure 2
Figure 2. Schematic of a switching-mode amplifier.
Think of the output transistor as a resistor that is switched on and off at the operating frequency with a given duty cycle. As Figure 2 indicates, the current in the output device can be very rich in harmonics. This harmonic content depends on the duty cycle and magnitude of the driving waveform, the FET "on" resistance, and the impedance presented to the PA. In a class D amplifier, the duty cycle of the input signal is varied to control the output power, a process known as pulse-width modulation (PWM). Class D amplifiers are utilized most often in audio applications where the power delivered by the amplifier changes constantly.
In a class E amplifier, the duty cycle of the input signal is fixed. The matching network is designed to minimize the voltage at the drain terminal of the switching while the switch is on. By minimizing the voltage across the output device while the output device draws current, one can minimize the power dissipated by the switching device and, therefore, maximize PA efficiency.
Similar to a class E amplifier, a class F amplifier requires special attention to the harmonic impedances in the design of the matching network in order to enhance efficiency. In general, the matching circuits for class F amplifiers are more complex because of the design constraints placed on harmonic impedances.
All Maxim CMOS ISM transmitters and transceivers provide an open-drain PA output. The duty cycle of the driving signal is a constant 25% over the full range of 300MHz to 450MHz. The user will design the matching network that provides the desired output-power level, current drain, and harmonic performance. This allows the user to achieve minimal power consumption while providing only the necessary amount of output power for the particular wireless application.
A simple model for a switching mode PA output is illustrated in Figure 3
Figure 3. Simplified model of a switching-mode amplifier.
In this illustration, RSW
is the on-resistance of the FET, CPA
is the effective sum of the device parasitic capacitances, CPKG
is the package capacitance, and CBOARD
is the board capacitance. Table 1
summarizes the typical switch resistance and capacitance for the Maxim ISM transmitters and transceivers.
Table 1. Switch Resistance and Capacitance Summary
||RSW (Ω, typ)
||CPA + CPKG + CBOARD (pF)
Note that the typical switch resistances are given for VDD
= 2.7V and that the board parasitic capacitance can vary significantly with layout. Class E and F amplifier theory and matching network-design equations are well documented in the literature2, 3, 4
and the reader can refer to these publications for additional background information. Considering the scope of this application note, it is sufficient to say, firstly, that the matching network and, therefore, the waveform at the PA output node must be designed to maximize the PA efficiency. Secondly, the maximum efficiency occurs when the voltage across the device is low when the switch is closed.
Switching-Mode Amplifier Simulations
In many low-cost ISM applications, the system designer may not have much flexibility in design time, cost, or complexity to optimize the PA matching network for maximum efficiency. Small (high-Q), inexpensive antennas are generally more efficient at transmitting higher frequencies, but regulatory concerns limit the harmonic content of the transmitted signal. Therefore, harmonic attenuation by the matching network is extremely important. Considering these facts, we analyzed the switching PA with the assumption that the output-matching network will be designed so that the voltage at the drain is highly filtered and therefore sinusoidal. See Figure 4
Figure 4. Switching-mode amplifier waveform.
Assuming that the PA is loaded with a resistance of RL and that the output voltage can swing as low as 0.1V, the efficiency of the PA can be expressed as:
|Efficiency = ½ × (VDD - 0.1)2/RL/VDD2/(4RSW) × (1 - (VDD - 0.1)/VDD × 23/2/π))
= 3V, RSW
= 22Ω, and RL = 400Ω, then the PA efficiency is 80% with an output power of 10.2dBm. This is approximately a 60% increase in efficiency when compared with an ideal class A amplifier. Of course, the voltage waveform, the switch resistance, and the load impedance are interdependent, so the above equation cannot be used as an accurate predictor of efficiency for all combinations of those variables. For this reason, SPICE has been used to model the performance of an ideal switching-mode PA. An ideal switched resistance of 11Ω or 22Ω is placed across a parallel tank circuit with a Q of 10. The simulation schematic is illustrated in Figure 5
; the simulated results are shown in Figure 6
Figure 5. Simulation schematic for an ideal switching-mode amplifier.
Figure 6. Ideal switching-mode amplifier performance vs. load resistance.
As Figure 6 indicates, one of the most significant advantages of the switching-mode PA is that the output power can be varied over a wide range by changing the load presented to the PA while excellent DC-to-RF efficiency is maintained. In addition, a switching amplifier with a lower switching resistance can put out more power at a higher efficiency, when compared to a higher switching resistance. The drawback of a lower switching resistance is that a higher driver current is required to charge and discharge the parasitic capacitance of the switching device.
As stated earlier, to maximize the efficiency of a switching-mode amplifier, the switch must be turned on only near a minimum in the voltage waveform. For the example of the switched resistor loaded with a simple parallel resonant circuit, one can satisfy this requirement by minimizing the imaginary component of the impedance presented to the PA at the operating frequency (including the parasitic capacitances of the device, package, and board). If the network is off resonance, or detuned, the efficiency can degrade significantly. Figure 7
illustrates the performance of an ideal switching-mode amplifier if the matching network is off resonance for Q=10 and Q=5.
Figure 7. Ideal switching-mode amplifier performance vs. detuning.
As seen in Figure 7, a current-drain minimum occurs at resonance. This fact can be used to verify that a given network has been optimized for a particular operating frequency. It should also be noted that the SPICE simulations assume that: the switch resistor can be turned on and off instantly; the parasitic capacitance of the switched device does not change as the device is turned on and off; and there is no loss or parasitic impedances in the tank inductor or capacitor. These factors can degrade the performance of an actual switched-mode amplifier when compared to the ideal simulations. An iterative approach is often required to optimize the PA matching network for a particular application.
In summary, some of the important highlights and characteristics of Maxim's ISM-band switched-mode amplifiers are:
- Switched-mode amplifiers rely on operation in the triode region for optimum efficiency and output power at low supply voltages. This contrasts with class A, B, and C amplifiers, where operation in the triode region is to be avoided
- All Maxim CMOS ISM switching-mode amplifiers provide an open-drain PA output. The user designs the matching network that provides the desired output power level, current drain, and harmonic performance. This flexibility allows the user to tailor the RF power-/current-drain tradeoff while maintaining high efficiency—key to maximizing battery life in designing a ResourceSmart solution.
- To maximize the efficiency of a switching-mode amplifier, the switch must be turned on only near a minimum in the voltage waveform. Minimizing the imaginary component of the impedance presented to the PA at the operating frequency (including the parasitic capacitances of the device, package and board) satisfies this requirement.
- Depending on the particular PA load impedance, a current-drain minimum can occur at resonance. This knowledge is useful for verifying that a given network has been optimized for a particular operating frequency and load.
- Behzad Razavi, RF Microelectronics, Prentice Hall, Engelwood Cliffs, NJ, 1997.
- N.O. Sokal and A.D. Sokal, "Class E: A New Class of High Efficiency Tuned Single-Ended Switching Power Amplifiers," IEEE J. Solid-State Circuits, vol. SC-10, pp. 168–176, June 1975.
- Scott Kee, Ichiro Aoki, Ali Hajimiri, and David Rutledge, "The Class E/E Family of ZVS Switching Amplifiers," IEEE Transactions on Microwave Theory and Techniques, MTT-Vol. 51, No. 6, May, 2003.
- Eileen Lau, Kai-Wai Chiu, Jeff Qin, John Davis, Kent Potter, and David B. Rutledge, "High-Efficiency Class-E Power Amplifiers, Part I & II," QST, Journal of the American Radio Relay League, May & June 1997.