System-Management IC Meets Monitoring and Sequencing Requirements in Multivoltage Systems
Traditionally, many of these functions have been performed with power-on resets and other µP supervisory circuits. In recent years, as the number of supply voltages has increased, the number of devices required to perform this duty has also grown, thus compounding complexity, cost, and the board space consumed.
Monitoring and Sequencing Complex SystemsThe easiest way to monitor a supply voltage is with either a power-on reset (POR) or a voltage-detector circuit. These devices can monitor a single voltage or multiple voltages. After the monitored supply voltage has powered up and exceeded the POR's voltage threshold, the POR's output does not de-assert until after a specified time period. This allows the system clocks to stabilize, and the system boot routine to initialize before permitting the µC to operate. These PORs and voltage detectors can also be used to sequence power supplies. Connecting the output of a POR that is monitoring one regulator to the shutdown pin of the next regulator (i.e., daisy-chaining them), one regulator will then come up after the other, once the POR's time delay has elapsed.
As the number of system supply voltages increases, voltage monitors and supervisors that monitor multiple voltages become necessary. However, because it is common for ten to fifteen voltages to power a complex system, several such devices are often needed.
Challenges When Using Multiple SupervisorsUsing this multiple-supervisor approach has its own problems. One problem is finding devices with the correct thresholds. Although there are a number of standard voltages, such as 3.3, 2.5, 1.8, 1.5, and 1.2V, many nonstandard voltages need to be monitored. This requires external resistor-dividers to set the monitored thresholds. If system-supply voltages change (e.g., you lower an ASIC's core voltage to reduce power consumption, or increase it to enhance the ASIC's performance), you would have to change the resistor values to accommodate these new voltages. Obtaining this flexibility requires these additional external resistors, and thus more board space and cost. The same problems occur when selecting the correct reset timeout periods.
Another problem with multiple supervisors occurs when a system must provide a specific power-up sequence. When larger numbers of supply voltages power a system, the daisy-chaining technique outlined above might not be capable of handling the timing when various supplies are coming up. Also, as the sequencing requirements change during development, altering circuitry to accommodate those later changes becomes problematic.
An additional sequencing problem can occur when these large systems use "silver box" or "brick" power supplies. These supplies simplify power-supply design, but pose a problem when a particular power-up sequence is required. For example, a brick supply that provides multiple output voltages might only have a single enable pin. Therefore, all its supply voltages turn on and off at the same time under the control of that one pin. A brick supply with multiple enable (or shutdown) inputs can resolve this issue. However, if multiple ICs share the same supplies (for example, a 3.3V I/O logic supply and a 1.8V core supply), the two ICs could have conflicting requirements. One device might require its core supply to come up before its I/O supply, while the second device might require its supplies to sequence in the opposite order.
This issue can be resolved with an external switch, such as a MOSFET. For low-power applications, you can use a p-channel MOSFET, which is generally more expensive than an n-channel MOSFET, but simpler to use. An n-channel MOSFET is optimal for higher current applications, because its lower on-resistance reduces the voltage drop across the switch. An n-channel can be used for very-low-voltage cores as well. However, to fully enhance an n-channel MOSFET, a high enough supply voltage must be available to provide a suitable gate-to-source voltage. In systems without this higher voltage, you can use ICs such as the MAX6819/MAX6820 power-supply sequencers to control the sequencing process; the internal charge pump for these devices guarantees a 5V gate-to-source voltage. This voltage drop is too high for some systems. Consequently, board designers sometimes double the number of regulators to avoid this sequencing problem.
As the number of supply voltages increases, using multiple MAX6819/MAX6820 circuits can work. As when using multiple PORs, these power-sequencing ICs can be configured to daisy-chain the power supplies. However, for a large number of voltages, this solution requires many discrete ICs, increasing the overall system cost and consuming too much board space.
The Margining FunctionThe ability to monitor and sequence supply voltages is critical to providing high levels of reliability. In many large, complex systems such as those found within telecom, networking, server, and storage equipment, additional testing of key components is required. One example is a margin test, which checks a system's performance as its voltages are temporarily varied up and down. Margining is often performed when a system is under development, but is also commonly implemented during the manufacturing process. The margining process is used to improve a system's long-term reliability.
The supply voltages can be adjusted by trimming the regulator's reference input (for voltage-regulator modules), altering the voltage regulator's feedback loop, adjusting a "brick" power supply's trim input, or by programming the regulator through an interface. There are various degrees of margining control. One method is an "all or nothing" approach in which the supplies are increased/decreased by some fixed amount (e.g., ±5% or ±10%). Another, more exacting method increases or decreases the supply voltages in smaller steps (e.g., 10mV or 100mV) to allow the evaluation of the system performance in greater detail. To gain more detailed information about the system voltages during normal operation and during the margining process, an analog-to-digital converter (ADC) can be used to accurately measure these values. Note that the POR controlling the µC needs to be disabled during the margining process to prevent the system from being reset.
Performing these margining functions can be quite tedious when working with large systems. You can use multiple supervisor devices to manage the margining process, along with the monitoring and sequencing tasks. However, this approach can be problematic. Aside from the cost of the ICs and the additional board space consumed, changes to the supply voltage levels or the sequencing order of those supplies are difficult to accommodate. This is because the requisite design changes are not trivial.
An Integrated System-Management DeviceOne way to minimize these monitoring and sequencing issues is through the use of a fully integrated, EEPROM-configurable system-management device such as the MAX6870. This type of IC integrates the functions required to monitor and sequence the system power supplies and to simplify the margining process. The MAX6870 provides the flexibility to change the voltage thresholds at multiple inputs easily; sequence the outputs in any order; and configure the outputs' structures to be push-pull, open-drain, or charge-pump enhanced. In addition, the digital inputs and outputs can be configured for active-high or active-low logic. Furthermore, the outputs can be either disabled or set to a predetermined state during the margining process.
Figure 1 is a block diagram depicting the MAX6870's features. This device's six inputs can monitor a system's various supply voltages, among other tasks. The two threshold levels that you program for each input can be set to detect two undervoltage conditions or an undervoltage and an overvoltage condition (i.e., a window detector). These threshold levels are programmed through an I²C* interface and stored in the configuration EEPROM. You can designate thresholds that range from 0.5V to 5.5V in 10mV and 20mV increments, depending on the threshold voltage range you select. One input, IN1, can monitor a voltage as high as 13.2V, and therefore can allow a 12V system bus voltage (or lower) to be monitored directly. A second input, IN2, allows either a second high voltage or a negative voltage to be monitored. The remaining inputs, IN3–IN6, monitor supply voltages with 0.5V to 5.5V levels.
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Figure 1. This IC can monitor and sequence multiple supplies, while providing ADC read capability. Internal EEPROM allows key parameters, such as thresholds, timing, logic dependencies, and output structures to easily be adjusted.
An internal multiplexer routes the six detector inputs, along with the two auxiliary inputs, to a 10-bit, 1%-accurate ADC. The ADC writes the digitized version of the voltage at each of these eight inputs to internal registers. Available through the I²C interface, these stored values are commonly used during the margining process, when trimming a power-supply output, or when checking the long-term stability of system voltages. Also, by using the two auxiliary inputs, you can read two additional voltages, such as the analog outputs from a current-sense amplifier or a temperature sensor.
The device operates when any of the voltages on IN3–IN6 exceeds the minimum operating voltage of 2.7V, or when IN1 exceeds 4V. Any of these inputs can power the device through the diodes pictured in Figure 1.
The six detector inputs and the four general-purpose inputs (GPIs) can assert any of the eight outputs, depending on the connections set up within the programmable array logic. Also, the outputs can be controlled by the device's other outputs, or by a mix of input and output signals. Each output's timing delay is independently programmable and can be stored in the IC's EEPROM.
The outputs are also configurable. You can set them up as open-drain outputs with internal or external pull-ups, or as push-pull outputs that can be connected inside the IC to any of the monitored supply voltages. All outputs can be active low or active high. Also, as mentioned above, different combinations of inputs and outputs can drive specific outputs; the MAX6870's programmable-array logic allows a wide variety of connections. For instance, OUT2 can be controlled by IN2 and also by OUT1. This type of connection is useful when the supply powered up by the OUT1 signal must come up before the supply powered up by the OUT2 signal.
The MAX6870 also includes an internal charge pump that allows OUT1–OUT4 to fully enhance an external n-channel pass element without the need for an additional supply voltage. Other features in this device include two watchdog timers with configurable watchdog timeouts and startup delays. The startup-delay feature of the watchdog timer provides a long delay after a reset condition. This delay allows extra time for the system initialization process, allowing memories to be uploaded and software routines to fully load.
A manual-reset input permits a test technician to manually assert all of the IC's outputs. The device's margin input can be used to latch the outputs in their current state to prevent the system from resetting during the margin process. The margin input can also be used to set the outputs into a predetermined state by programming the associated EEPROM registers. The MAX6870 also provides 4kb of user EEPROM to store items such as serial board identification, board-revision history, and other programming information.
The MAX6870, moreover, includes configuration registers and configuration EEPROM. During the prototyping phase of a project, you can write updates to the configuration registers to make immediate changes. If these changes are acceptable, you can then write them into the configuration EEPROM. To reload the saved EEPROM configuration, the system can be rebooted through a software reboot or through a complete hardware reboot. The configuration EEPROM downloads its data to the configuration registers during the reboot phase.
The MAX6870's EV KitTo simplify the MAX6870's configuration process, an EV kit is available that allows you to point and click on your computer screen to load the correct configuration information. Each screen allows you to configure a part of the device without referring to the register tables. The screens allow you to set threshold levels, timing delays, logic operating states (active low/active high), and logic input configurations, as well as to configure the outputs.
Figure 2 shows the main configuration screen from the MAX6870 Evaluation Software. You can click on the blocks within the block diagram or on the tabs. Clicking on one of the blocks allows you to configure that specific block. Clicking on a tab brings up a screen specific to a particular function. For instance, when you select the Voltage Monitor tab (Figure 3), the screen that appears allows you to easily select the thresholds and configure the inputs. Or when you click on the Output tab (Figure 4), you can set up the output as open-drain, push-pull, or charge-pump enhanced, as well as set up the logic terms that determine the output's state.
Figure 2. Click on the appropriate box or tab to set up thresholds, delays, output configurations, and logic.
Figure 3. By clicking on the voltage monitor tab, you can determine for each input whether it monitors two undervoltage levels, or an undervoltage and an overvoltage level. You can also set the thresholds and select which digitized inputs can be viewed.
Figure 4. By clicking on the output tab, you can configure each output to be open-drain, push-pull, or charge-pump enhanced. Each output is connected to the IC's programmable logic array and can be used to control other outputs.
Once you have completed the device's configuration, you can save the configuration data in its EEPROM. In addition, this data can be saved to a file that can be loaded to another device. Of course, you can write directly to all the configuration registers and the configuration EEPROM through the I²C interface. The data sheet for the MAX6870 provides the values needed to do this. Using this approach, however, takes more time and increases the chances of error.