But what about the integrity of devices operating at lower levels of core/supply voltage? Those levels are generated from linear or switching power supplies, so how can you assume they are within specification before the reset period has elapsed? By monitoring only a single voltage in a multi-voltage design, the risk can go undetected that improperly powered devices may be loading the bus or responding in an erratic manner, causing software to deviate from its expected procedure. A good foundation for reliable design must therefore include the ability to monitor all voltages.
Available supervisors can monitor two, three, or even four supply voltages, either with factory-programmed thresholds or with a combination of factory and resistor-programmable thresholds. Factory-programmed thresholds are usually available in increments of 50mV to 100mV below the monitored voltage level, so a supervisor is selected according to its specified tolerance. If, for example, a supervisor family specifies thresholds of 3.3V, 3.08V, 2.93V, and 2.63V, you compose a part number for the device by noting the desired voltage and its corresponding suffix.
Factory-programmed supervisors are single-chip devices that require no external components for threshold settings. The absence of resistor dividers for the thresholds also eliminates a source of power dissipation. Resistor-programmable devices, on the other hand, are suitable for engineers who want to avoid an application-specific device. Once your company qualifies a particular supervisor, you can easily change its threshold by substituting one or two resistors. And for single-supply systems, you can use the same multi-voltage supervisor after disabling its other inputs.
Resets also occur in response to a low voltage, manual reset, or watchdog timeout. Reset initializes the code, and thereby prevents the processor from executing code that might have been corrupted by a low voltage or software bug. If processor specifications permit, it may be more suitable to increase or decrease the reset period. Available devices provide reset periods ranging from 1 millisecond to 1.2 seconds.
The reset period also allows the supply voltages, crystal, and phase-locked loop (PLL) to stabilize. The crystal and PLL have the largest effect on reset period duration. A 20MHz crystal without PLL can use a short timeout, but a 32kHz crystal phase-locked to 20MHz with a PLL requires a longer timeout.
Open-drain outputs are generally more flexible. They allow simple wire-OR connections, and easily form an interface to devices operating at different system voltages. Open-drain outputs allow the Reset output to be pulled low by multiple sources without contention. The penalty for that flexibility is the external pull-up resistor.
Push-pull outputs in single-voltage systems are straightforward, but those in multi-voltage systems require more care. Consider, for example, a dual supervisor used to monitor 3.3V and 5.0V supplies. For the two internal voltage monitors it has one push-pull reset output, which can swing between ground and the 3.3V rail or (in another version) between ground and the 5V rail. In that case you choose the version whose voltage swing is compatible with the processor's reset input. Or, the dual supervisor may have two outputs-one associated with the 3.3V monitor, and one with the 5V monitor. You can choose a version in which each output swings to the corresponding monitored rail, or both swing to the same rail.
Figure 1. Typical Transient Duration vs. overdrive (graph) for the MAX6381.
As you can see, a 50µsec, 50mV transient will not reset the device; resets occur only for transients of longer duration or greater magnitude. Thus, the graph provides a means for avoiding the dreaded nuisance resets. Note that supervisors with a higher level of transient rejection may also permit the use of a lower-cost power supply requiring less filtering (assuming the processor can tolerate the resulting supply-voltage variation).
The art in implementing a watchdog timer is to place the timer resets so they preclude the possibility of a stuck loop. A handy tip is to force a low-to-high transition in one routine and a high-to-low transition in the next routine in the sequence. Then, a reset will occur if the software is stuck in one of the routines. Placing a low-high-low pulse in a single subroutine does not produce a reset, so the software could remain locked.
To accommodate processors with extended power-up and stabilization requirements, some supervisors provide longer initial watchdog periods. A longer period allows the processor time to initialize and configure itself before implementing the subsequent shorter and more rigorous watchdog intervals.
Manual resets typically trigger a reset period. To reduce test time, however, the reset period should be short. MAX6390 ICs address this concern with periods about one-eighth that of a standard reset period (for a MAX6390D4, the Manual Reset pulse is 140msec minimum and the reset period is 1.12sec).
In addition to level-sensitive manual-reset inputs, some applications may require edge-sensitive inputs, which ensure that the processor is reset for a fixed period rather than a period that depends on how long the manual-reset input is held low. That capability is handy for reducing product-assembly and test time.
Analog-output failures can occur in a number of ways, but a simple negative voltage monitor can confirm that the expected supply voltages are present and within specification. Analog modules with -5V or -15V rails, for instance, often produce analog outputs for which there is no supply-voltage feedback to verify their validity. Fortunately, an over-voltage monitor can also monitor a negative voltage. As for the over-voltage case, the supply voltage is sensed by an external resistor divider between that voltage and Vcc (Figure 2).
Figure 2. Negative voltage monitor using the MAX6347.
One type of sequencer for a 2-voltage system (I/O = 3.3V and core = 2.5V) employs a single-voltage supervisor that monitors the 3.3V supply. When that voltage is above its threshold, the supervisor delays and then enhances an external p-channel MOSFET (Figure 3). That approach is cost effective for low-current applications, but for higher currents the cost of a low-Rdson p-FET with low Vgs threshold can be high.
Figure 3. Power sequencer using the MAX6347.
For higher-current applications, a dedicated power sequencer with charge pump may be more effective. As in the preceding example, this circuit monitors a supply voltage and activates an external FET to bring up the second supply. The IC device, however, allows use of an n-channel FET that costs less than the p-channel device. The internal charge pump provides a Vgs of 5.0V, which fully enhances the n-FET powering the second supply. Not only does the n-FET cost less; its Rdson is notably lower.
As examples, the MAX6819 and MAX6820 are SOT-23 power sequencers that require no external charge-pump capacitors. The MAX6819 has a fixed 200msec delay, and the MAX6820 has a variable delay. An external capacitor sets the delay according to the relationship
tDELAY(sec) = 2.484x10-6(Cset).
These ICs also enable straightforward sequencing in applications with more than two supply voltages. To sequence all supplies, you simply add one sequencer for each additional supply voltage (Figure 4).
Figure 4. Sequencing an additional supply.
Another simple method achieves the same result with voltage detectors. Voltage detection can be more informative than supervision, because it indicates which supply voltage has a problem. Supervision usually ORs together all voltages and generates a single reset, whereas a multi-voltage detector usually offers open-drain outputs that can be reviewed individually to determine the source of the problem. Quad-voltage monitors are available with independent open-drain outputs. Such devices can include resistor-programmable thresholds as well as factory-programmed thresholds that accommodate supply voltages of 1.8V, 2.5V, 3.3V, 5.0V, or -5.0V. An internal precision voltage reference and internal voltage dividers make these ICs very compact.