APPLICATION NOTE 2744

Abstract: Clock (CLK) generators and synthesizers form the pulse of a complex digital system and errors in a clock's signal quality can have wide-ranging effect.

One of the most important performance measurements is clock jitter. Jitter is defined as \"the short-term variation of a signal with respect to its ideal position in time.\" In a clock generator chip, there are many factors which contribute to output clock jitter, such as the device noise, supply variation, jitter in the reference clock, loading condition, and interference coupled from nearby circuitry.

Jitter can be measured in different ways, including period jitter J

where T

For some digital circuits, Jcc is more meaningful than J

Jcc is measured by its Peak-to-Peak value in a given time period. It is mathematically defined as

where n is a cycle index and N is a number for a given period.

It is noted that J

SEMI (Semiconductor Equipment and Materials International) [1] has specified a more accurate method for measuring the period jitter of high-speed clock. As shown

These two approaches are also called the "cursor technique" for jitter measurement. The advantages of these methods are that they are easy to understand and perform. They are good for a first-order estimate.

The concerns are that this technique is susceptible to trigger jitter, can be unreliable or misleading for accumulated jitter measurement, and lack statistical information that describe jitter characteristics.

More accurate measuring methods have been employed. Most of them use a post-sampling process of measured data using a high-speed digital oscilloscope to estimate all three jitters according to their mathematic definitions in Eqs. 1-3. This post-sampling approach provides precise results, but it can only be performed by certain high-end digital oscilloscopes from Tektronix [2] or LeCroy [3].

From Eq. 4 we see that the sinusoid signal is phase modulated by the phase noise Θ(t). Using Fourier series expansion, it can show that a square wave clock signal has the same jitter behavior as that of its base harmonic sinusoid signal. This reveals a fact that we can quantize the jitter of the clock signal through examining the phase modulation of its first harmonic sinusoid, which lays the foundation for measuring jitter in frequency domain. Since the phase noise is always small comparing to π/2, Eq. 4 can be approximated as

Assuming that the jitter is a stationary random process, the mean square (MS) of the clock can be written as

In frequency domain, we know that the sin and cos functions in Eq. (6) will generate tones at -ωc and ωc. Therefore, if we take the tones off the power spectrum of C(t), what left is the power spectrum of the phase noise, indicated by P

According to the Wiener-Khintchine theorem [5] we can obtain the MS of Θ (t) by integrating P

From Eq. (5), we can get the root of MS (RMS) of the period jitter J

Result shown in Eq. (9) is the essential equation used in measuring RMS jitter in frequency domain. Because of the relation of power spectrums of the clock signal and the phase noise, shown in Figure 5, designers often use the compression (in dB) from the power of the tone to the envelope of the noise power spectrum at a certain frequency apart from fC to measure the quality of a clock signal.

[1] SEMI G80-0200, "Test method for the Analysis of Overall Digital Timing Accuracy for Automated Test Equipment".

[2] Tektronix Application Note: "Understanding and Characterizing Timing Jitter", https://www.tek.com/primer/understanding-and-characterizing-timing-jitter-primer

[3] LeCroy White Paper: "The Accuracy of Jitter Measurements", http://www.lecroy.com/tm/Library/WhitePapers

[4] Masashi Shimanouchi, "An Approach to Consistent Jitter Modeling for Various Jitter Aspects and Measurement Methods", IEEE International Test Conference, pp 848 - 857, 2001.

[5] L. W. Couch, "Digital and Analog Communication Systems", Macmillan Publishing, New York, 1987.