One-Shot Timing Improves Microprocessor Reset Circuit
Figure 1. A standard manual reset exhibits these timing characteristics.
But some applications can't allow the microprocessor to be held in reset mode for long periods of time, like when a pushbutton is held closed or driver logic is locked low. Because the processor can't perform routine system maintenance while in reset, a prolonged reset can cause improper operation or data loss. For such applications, the system designer must provide an external input that resets the processor for only a fixed, limited interval.
A manual-reset function based on a monostable multivibrator (one-shot) can easily be added to several standard microprocessor-supervisory circuits (Figure 2).
Figure 2. This one-shot manual reset circuit is implemented with an active-low MR pulldown capacitor.
The one-shot produces a single fixed-period timeout pulse each time the pushbutton is closed, independent of the closure duration (Figure 3).
Figure 3. Using the one-shot circuit produces a single fixed-period manual reset.
For many applications, the circuit only needs an external capacitor (C1) connected between the pushbutton switch and manual-reset input, plus an external resistor (R1) connected as a pullup to zero the initial capacitor voltage. The microprocessor-supervisor's internal reset-timeout period supplies the one-shot timing.
To initiate a manual reset, ground the minus side of C1 by closing the push-button switch. Because the voltage across the capacitor (0V) can't change instantly, the plus side of C1 is pulled toward ground as well. The resulting low VIL at active-low MR forces a manual reset, causing the MAX6384/MAX6386 to assert a low active-low RESET output.
While the pushbutton remains closed, the minus side of C1 remains at ground, and the plus side charges to VCC (through the active-low MR pullup resistor internal to most µp-reset circuits). The supervisor deasserts its reset output only when the voltage at active-low MR exceeds VIH and the supervisor's internal reset period has elapsed. That timeout period also filters any short bounces during the switch closing.
When the pushbutton switch opens, the voltage at the minus side of C1 charges to VCC through the external pullup resistor R1. This action zeros the capacitor voltage and prepares for the next manual reset (C1- = C1+ = VCC). To prevent overvoltage at active-low MR with respect to VCC, C1+ should be clamped to VCC through a diode. (Without clamping, the C1+ voltage could approach 2VCC.) The diode can be internal to the supervisor, as protection circuitry on the active-low MR input, or external as shown by D1 in Figure 2.
To ensure that the microprocessor-reset circuit recognizes the active-low MR event, C1's value should be large enough, with respect to the internal active-low MR pullup resistor, to hold the active-low MR input voltage below VIL for at least 1µs. The R1 value should be small enough to zero the capacitor in time for the next manual reset and to minimize the effects of bounce when the switch is opened. The one-shot circuit can be driven by external logic instead of a pushbutton switch. In that case, the microprocessor will reboot after a short reset timeout, even if the external logic output remains low.
A similar version of this article appeared in the October 28, 2002 issue of Electronic Design magazine.