Maxim Integrated partnered with First Sensor to design a reference design featuring the First Sensor 4-channel APD array, Maxim quad TIA with multiplexer MAX40662, and Maxim single fast comparator MAX40026.
This document highlights how easy it is to interface these three critical components when designing the front end of a receiver in a light detection and ranging (LiDAR) module. The MAX400662 and MAX40026 are AEC-Q100 qualified. So, these are highly suitable for automotive applications. These can be used in any industrial or commercial applications needing LiDAR.
This document provides some tips and recommendations seamlessly applied to systems with a higher count of channels.
- 4-Channel APD
- Quad Channel TIA with MUX
- Single Fast Comparator
Designed, Built, Tested
Board pictured here has been fully assembled and tested.
The quad-channel LiDAR receiver front-end reference design features a 4-channel avalanche photodiode (APD) array from First Sensor, interfacing the Maxim Quad TIA MAX40062 and Maxim single fast comparator MAX40026.
The reference design implements test points to check each part of the board independently. Table 1 describes each critical piece of the board in detail with a focus on how to interface the APD to the trans-impedance amplifier (TIA) and the TIA to the comparator.
A special paragraph is dedicated to the layout recommendations.
Table 1. Bill of Materials
|C1, C19||2||CAPACITOR; SMT (0402); CERAMIC CHIP; 100PF; 50V; TOL=5%; TG=-55 DEGC TO +125 DEGC; TC=C0G|
|C2||1||CAPACITOR; SMT (0402); CERAMIC CHIP; 2200PF; 50V; TOL=10%; TG=-55 DEGC TO +125 DEGC; TC=X7R|
|C3||1||CAPACITOR; SMT (0402); CERAMIC CHIP; 1UF; 10V; TOL=10%; MODEL=; TG=-55 DEGC TO +85 DEGC; TC=X5R|
|C4, C10, C11||3||CAPACITOR; SMT (0402); CERAMIC; 0.1UF; 16V; TOL=10%; MODEL=GRM SERIES; TG=-55 DEGC to +85 DEGC; TC=X5R|
|C5||1||CAPACITOR; SMT; 0402; CERAMIC; 2.2uF; 6.3V; 20%; X5R; -55degC to + 85degC; 0 +/-15% degC MAX.|
|C20-C23||4||CAPACITOR; SMT (0402); CERAMIC CHIP; 0.1UF; 50V; TOL=10%; TG=-55 DEGC TO +125 DEGC; TC=X7R|
|C24||1||CAPACITOR; SMT (0402); CERAMIC CHIP; 2.2UF; 35V; TOL=20%; MODEL=C SERIES; TG=-55 DEGC TO +85 DEGC; TC=X5R|
|C25||1||CAPACITOR; THROUGH HOLE-RADIAL LEAD; ALUMINUM-ELECTROLYTIC; 3.3UF; 400V; TOL=20%; TG=-40 DEGC TO +85 DEGC|
|CIN1, CIN3, CIN5, CIN7||4||CAPACITOR; SMT; 0402; CERAMIC; 100pF; 50V; 10%; C0G; -55degC to + 125degC; 0 +/-30PPM/degC|
|CIN2, CIN4, CIN6, CIN8||4||CAPACITOR; SMT (0402); CERAMIC CHIP; 0.1UF; 25V; TOL=10%; MODEL=GRM SERIES; TG=-55 DEGC TO +125 DEGC; TC=X7R|
|GND1-GND4, J5, V1_SUPPLY, VCC||7||EVK KIT PARTS; MAXIM PAD; WIRE; NATURAL; SOLID; WEICO WIRE; SOFT DRAWN BUS TYPE-S; 20AWG|
|IN1-IN4, J6, J7, OUTN, OUTP||8||CONNECTOR; FEMALE; SMT; SMA JACK PCB; RIGHT ANGLE; 2PINS|
|I_OFFSET, LP, SEL0, SEL1||4||CONNECTOR; MALE; THROUGH HOLE; SMB JACK VERTICAL PCB MOUNT; STRAIGHT; 5PINS|
|J1||1||CONNECTOR; MALE; THROUGH HOLE; BREAKAWAY; STRAIGHT THROUGH; 3PINS; -65 DEGC TO +125 DEGC|
|J2-J4||3||CONNECTOR; MALE; THROUGH HOLE; BREAKAWAY; STRAIGHT; 4PINS|
|L1||1||INDUCTOR; SMT (0402); FERRITE-BEAD; 600; TOL=+/-25%; 0.2A|
|L2||1||INDUCTOR; SMT (0402); FERRITE-BEAD; 600; TOL=+/-25%; 0.9A|
|MH1-MH4||4||MACHINE SCREW; SLOTTED; PAN; 4-40IN; 3/8IN; NYLON|
|MH1-MH4||4||STANDOFF; FEMALE-THREADED; HEX; 4-40IN; 3/8IN; NYLON|
|R1-R3, R7-R14, RCL||12||RESISTOR; 0402; 0 OHM; 0%; JUMPER; 0.10W; THICK FILM|
|R4||1||RESISTOR; 0402; 1K; 1%; 100PPM; 0.0625W; THICK FILM|
|R5||1||RESISTOR; 0805; 10K; 1%; 100PPM; 0.125W; THICK FILM|
|R6||1||RESISTOR; 0805; 100 OHM; 0.1%; 25PPM; 0.125W; THICK FILM|
|R15||1||RESISTOR; 0805; 33K; 1%; 100PPM; 0.125W; THICK FILM|
|R16||1||RESISTOR; 0603; 250 OHM; 0.1%; 25PPM; 0.1W; THIN FILM|
|R17||1||RESISTOR, 0805, 750 OHM, 1%, 100PPM, 0.125W, THICK FILM|
|R18||1||RESISTOR; 0603; 402 OHM; 1%; 100PPM; 0.10W; THICK FILM|
|R19||1||RESISTOR; 0603; 604 OHM; 0.1%; 25PPM; 0.1W; METAL FILM|
|RT1-RT4||4||RESISTOR; 0402; 49.9 OHM; 0.1%; 25PPM; 0.063W; THICK FILM|
|SU1-SU4||4||TEST POINT; JUMPER; STR; TOTAL LENGTH=0.24IN; BLACK; INSULATION=PBT;PHOSPHOR BRONZE CONTACT=GOLD PLATED|
|TP1||1||CONNECTOR; FEMALE; PANELMOUNT; NON-INSULATED RECESSED HEAD BANANA JACK; STRAIGHT THROUGH; 1PIN|
|U1||1||EVKIT PART - IC; AMP; QUAD TRANSIMPEDANCE AMPLIFIER WITH INPUT CURRENT CLAMP AND MULTIPLEXER FOR LIDAR; PACKAGE OUTLINE DRAWING: 21-100204; PACKAGE CODE: T1644Y+5C; LAND PATTERN: 90-0070; TQFN16-EP|
|U2||1||EVKIT PART-DIODE; FIRST SENSOR APD ARRAY; SMT; PIV=200V|
|U3||1||EVKIT PART - IC; MAX40026; PACKAGE OUTLINE: 21-100185; PACKAGE CODE: T822Y+3; TDFN8-EP|
Gain Selection Input (GAIN)
The J1 jumper is implemented to adjust the gain of the TIA. Set the gain to 25kΩ or 50kΩ in a static way in the application by connecting the GAIN pin to the GND or VCC permanently or have a dynamic signal controlled by a microprocessor to change the gain on the fly as required in the application. See Table 2 for more details.
Table 2. Jumper Table (J1)
|J1||1 TO 2||Connects GAIN to GND (Gain = 25kΩ)|
|2 TO 3||Connects GAIN to VCC (Gain = 50kΩ)|
Table 3. Jumper Table (J2)
|J2||1 TO 2||Connects LP to GND (Low-Power Mode On)|
|1 TO 3||Connects LP to LP External Connector for External Control|
|1 TO 4||Connects LP to VCC (Normal Mode On)|
The SEL0 and SEL1 jumpers are used to select the channel sent to the comparator. The channel selection is static in this reference design. In a normal application, these two pins are connected to a microprocessor to control the channel to output dynamically. See Tables 4 and 5 for more details.
A 4-channel APD array for near infrared (NIR) detection of First Sensor is used. It is placed in a ceramic carrier type non-hermetic SMD package with AR-coated glass window. The used APD arrays are engineering samples for LiDAR applications (autonomous driving, industrial, and commercial) with the following technical parameters.
Table 4. Jumper Table (SEL0, SEL1, J1, J2)
|SEL0||1 TO 2||Connects SEL0 to VCC (1) – Refer to Table 5 for Channel Selection Decoding Table|
|2 TO 3||Connects SEL0 to GND (0) – Refer to Table 5 for Channel Selection Decoding Table|
|SEL0||1 TO 2||Connects SEL1 to VCC (1) – Refer to Table 5 for Channel Selection Decoding Table|
|2 TO 3||Connects SEL1 to GND (0)– Refer to Table 5 for Channel Selection Decoding Table|
Table 5. MUX Channel Selection Decoding Table (SEL0, SEL1)
|SEL1:SEL0||SELECTED INPUT CHANNEL|
Table 6. Electrooptical Characteristics at 23°C
|No. of Elements||4|
|Active Area||per element||470 x 500||µm|
|Gap; Pitch||40 ; 510||µm|
|ID||Dark Current||M = 100, per element||50||500||pA|
|C||Capacitance||M = 100, per element, f = 100kHz||0.55||pF|
|Responsivity||M = 100, λ = 905nm||52||58||A/W|
|tR||Rise Time||M = 100 V; λ = 905nm; RL = 50Ω||1.3||Ns|
|VBR||Breakdown Voltage||IR = 2µA||160||200||240||V|
|Cross Talk||λ = 905nm||50||dB|
|Photocurrent Uniformity||M = 50||±2||±10||%|
|T||AR Coating Cover Glass||λ = 905nm, AOI = 0°||99||%|
Figure 3. Technical drawing.
APD to TIA Connection
The APD outputs are connected to the TIA in a DC-coupled fashion. There is no need for AC coupling capacitors in this case although it is left to the discretion of designers to select from the AC or DC coupling based on the application requirements. Both schemes are allowed.
Connectors were added in this design to access the TIA independently. These are AC-coupled (Figure 3).
Alternative Input to Bypass APD
The APD array can be bypassed and each TIA input channel can be fed from an external electrical source generator. Unsolder all the four 0Ω resistors R11, R12, R13, and R14, and populate the following resistors with 0Ω: R3, R7, R8, and R10.
TIA to Comparator Connection
The TIA outputs in this design are sent to the comparator inputs in an AC-coupled mode using the C10 and C11 capacitors. Then, R16, R17, R18, and R19 allow to create the necessary offset between IN+ and IN- for the proper operation of the comparator.
The MAX40026 provides a low-voltage differential signaling (LVDS) output, which can be sent directly to any processing circuit.
Figure 4. 4-channel APD schematics.
Figure 5. AC-coupled external input to the TIA.
Figure 6. Interface between the TIA and comparator.
Quick Start Guide for PC Application
- 3.3V/200mA DV Power Supply
- -50V/200mA DC Power Supply
- 500MHz Digital Oscilloscope with Two Channels
- Two Equal Length SMA Cables
- Light Source (Flashlight)
- Connect the -50V supply to the -HV and GND banana jacks of the MAXREFDES_LIDAR1 board.
- Connect the 3.3V supply to VCC and GND pads of the MAXREFDES_LIDAR1 board.
- Verify the shunts are installed on the jumpers according to Table 7.
- Connect the SMA cables to OUT+ (J6) and OUT- (J7) connectors of the board to the oscilloscope channels.
- Turn on the power supplies.
- Apply the light source on U2 of the MAXREFDES_LIDAR1 board (about one inch away).
- Monitor the oscilloscope. The OUT+ and OUT should toggle like Figure 7.
- Move the shunt of the jumper SEL0 to the 1 to 2 position. Repeat steps 6 and 7.
- Move the shunt of the jumper SEL0 to the 2 to 3 position and SEL1 to 1 to 2 position. Repeat steps 6 and 7.
- Move the shunt of the jumper SEL1 to the 2 to 3 position. Repeat steps 6 and 7.
- The test is complete.
Table 7. Jumper Position
Figure 7. OUT+ and OUT- signal.
A 4-layer PCB board is used for this reference design with a high-performance substrate material like Rogers. The top and bottom layers implement all the signals, while layer 2 and 3 are used as ground planes.
The following guidelines are implemented:
- A differential microstrip is used for the MAX40662 outputs with terminations close to the outputs. Avoid unwanted stubs by removing the ground below the traces not part of the termination line leading into the input pins. The parasitic capacitance created between the traces and ground slow down and even distort the signals by creating reflections on the path.
- The input trace connecting each of the photo-diode array to the IN_ of the MAX40662 should be as short as possible and have ground etched/removed underneath. This reduces unwanted parasitic capacitance created in the PCB. Longer trace lengths increases the parasitic inductance in the signal trace paths.
- There are four input traces in the design. It is critical to include a ground isolation between them to minimize channel to channel coupling.
- Mount one or more ceramic capacitors between the GND and VCC as close to the pins as possible. Multiple bypass capacitors reduce the effect of trace impedance and capacitor ESR.
- Bypass capacitors are chosen for minimum inductance and ESR.
- Minimize any parasitic layout inductance by keeping the traces as short as possible.
|Figure 10. MAXREFDES_LIDAR1# layout (silk screen).|
Figure 11. MAXREFDES_LIDAR1# layout (top).
Figure 12. MAXREFDES_LIDAR1# layout (ground 2).
Figure 13. MAXREFDES_LIDAR1# layout (ground 3).
Figure 14. MAXREFDES_LIDAR1# layout (bottom).
Figure 15. MAXREFDES_LIDAR1# layout (silk bottom).
|Input Type||Vin(Min)||Vin(Max)||Iout(Max)||Single/Multiple Output||Vout(V)||Pout(W)||Isolated/Non-Isolated||Topology|
Order NowMAXREFDES_LIDAR1#: Quad-Channel LiDAR Receiver Front-End Reference Design, MAX40662, MAX40026
|Part Number||Buy from Maxim or Third Party|
Maxim Devices (2)
|Part Number||Name||Product Family||Order||Design kits and evaluation modules|
|MAX40662||Quad Transimpedance Amplifier with Input Current Clamp and Multiplexer for LiDAR||Amplifiers||Buy Now||Design Kits|
|MAX40026||280ps High-Speed Comparator, Ultra-Low Dispersion with LVDS Outputs||Amplifiers||Buy Now||Design Kits|