On-Demand Webinar: Your FPGA Design Starts with the Right Power Supply

April 18, 2019

Christine Young  By: Christine Young
 Blogger, Maxim Integrated 

Since they’re programmable and reconfigurable, FPGAs can pave the path to a faster design process because you can easily make adjustments as design requirements change. However, developing the power supply to support the FPGAs can be quite challenging. In his recent webinar, “Your FPGA Design Starts with the Right Power Supply,” Maxim’s Eric Rule discussed what’s needed to address these challenges in order to create a state-of-the-art FPGA design.

An FPGA can have eight or more different rails that need to be powered by DC-DC converters. There are power-up and power-down sequencing restrictions to meet, the need to optimize efficiency for heat distribution, and the need to ensure that the power supply design is compact and power density remains high, according to Rule, a member of the technical staff in Maxim’s Mobile Solutions business unit. The rails have a range of voltage requirements, typically low enough to be powered by buck regulators or LDOs. Low-voltage core rails do, however, require high current and they generate fast transient events.

Let’s take a look at the key rails associated with FPGAs, along with their primary requirements:

  • Core rail: Powers critical internal logic functions, such as configurable logic blocks, block RAM, and DSP blocks. Of all the rails, the core rail has the highest current requirement with typically very strict accuracy requirements. Because this rail is typically first in the sequence, it must be sequenced properly.
  • I/O rail: Powers I/O output drivers. Its current requirement is based on the number of I/Os in the design and, compared to the other rails, its accuracy requirement is typically less strict (5%). It also takes lower priority in the sequencer.
  • Auxiliary rail: Powers auxiliary functions. Its current requirement is generally very low and its voltage is typically at 1.8V. This rail’s accuracy requirements are typically less strict than other rails.
  • Transceiver rail: Powers different transceiver blocks. Current requirements are approximately 1A to approximately 2A and the voltage range is about 1V to 1.8V. This rail typically requires high accuracy and low noise.

Video game consolePortable video game consoles are an example of an FPGA-based design that can benefit from a power supply that utilizes multiphase buck regulators.

Multiphase Buck Regulators for FPGA Power Rails
Rule highlighted the pros and cons of a couple of FPGA power supply design directions: discrete ICs versus modules. Discretes have the advantages of providing better thermal dissipation, flexibility to be tailored to the application, and better performance at lower cost and less board space. On the other hand, discrete ICs do require more design work and a larger bill of materials (BOM). Modules, consisting of multiple discrete power ICs integrated into a single package, boast benefits such as easier implementation (and, thus, shorter design time) and smaller BOM. They’re also easier to replace. However, working with modules comes with many disadvantages: difficult debugging when issues arise, potentially worse performance, cost, and, possibly, thermal performance issues, Rule explained.

Multiphase buck regulators provide another option to meet FPGA power requirements. As Rule explained, multiphase buck regulators split switching of a single output between multiple sets of switches. The phases are typically interleaved and out of phase proportional to the number of phases. For instance: two phases are 180 degrees out of phase, three are 120 degrees out of phase, and four are 90 degrees out of phase. Each phase has its own inductor, caps, and switches. With multiphase regulation, you get:

  • Reduced output ripple via ripple current cancellation
  • A smaller component size, with less current per phase
  • Better transient response, with less energy stored in L

With the phase configurability, you also gain design flexibility. The phase configuration can be changed as your design requirements change throughout the design process. To illustrate his case, Rule introduced an example that he said is ideal for powering an FPGA’s rails: the MAX77812 quad output/quad phase configurable buck converter. This device supports five configurations: four outputs (5A each), three outputs (one at 10A, two at 5A), two outputs (2 each at 10A), two outputs (one at 15A and one at 5A), and one output (20A). Its input voltage range is 2.5V to 5.5V and its output voltage range is 0.25V to 1.525V.

Given that low-voltage core rails require high current and generate fast transient events, MAX77812 is ideal for powering these rails. For the I/O rail, the current requirement is usually low enough for one phase of the buck converter to handle. As for the auxiliary rail, the MAX77812 can support its voltage requirement with an extra resistor divider. Read the application note, “Generating a Higher Output Voltage than 1.525V Using the MAX77812,” for details. The auxiliary rail can also be supplied with a rail from a companion power-management IC. The MAX77812 also works well for transceiver rails; in these cases, a good layout is important to minimize switching noise.

One of the MAX77812 features that Rule highlighted during his session is dynamic voltage scaling (DVS), which you can use to control the amount of power delivered to the load. DVS up “overvolting” is for performance, while DVS down “undervolting” conserves power, he explained. One of the device’s two user-programmable general-purpose inputs (GPIs) can be used to apply DVS to an output voltage. Up/down ramp rates are individually programmable with two bitfields.

Create a Lights-Out Layout
Through his webinar, Rule also walked through the key steps to creating a schematic with the buck converter: understanding your FPGA’s requirements, establishing the power source, performing phase configuration, communicating with the device via I2C or SPI, and sequencing. To generate the best possible performance from MAX77812, Rule offered these layout tips:

  • Keep the layout compact, as smaller is better for efficiency, noise, and, of course, space
  • Keep the input and output caps close to the bumps
  • Make the top layer a hot loop, with a ground plane the next layer down for better thermal performance, minimized inductance, and a shorter path for the switching current
  • Connect AGND/DGND and PGND to a ground flood separately to minimize noise on the analog circuitry
  • Route the multiphase outputs as symmetrically as possible
  • Route the sense lines directly to the closest output capacitor
  • Avoid breaking up ground or hot loops

For more details, watch Rule’s webinar, “Your FPGA Design Starts with the Right Power Supply,” on demand. Another resource that discusses buck converters for applications based on FPGAs and DSPs is the white paper, “Generating Greater System Efficiency for Single- to Multi-Cell Battery-Powered Designs.”