
Keywords: flyback, continuous conduction mode, CCM, discontinuous conduction mode, DCM, transformer, optoisolated feedback, error amplifier compensation, pi controller, biasing optocoupler, flyback converter, peak current mode controller, MAX17596, MAX17595
Related Parts


Designing Flyback Converters Using PeakCurrentMode Controllers
By: 
Srinivasa Rao Meesala 

Abstract: Flyback converter design using MAX17595/MAX17596 is outlined. Design methodology and calculations for components value selection are presented. Continuous conduction mode (CCM) and discontinuous conduction mode (DCM) are treated individually.
Introduction
This application note describes the methodology of designing flyback converters using the
MAX17595/MAX17596 peakcurrentmode controllers. Flyback converters may be operated in discontinuous conduction mode (DCM) or continuous conduction mode (CCM). The component choices, stress level in power devices, and controller design vary depending on the operating mode of the converter. Formulas for calculating component values and ratings are also presented.
DCM Flyback
Primary Inductance Selection
In a DCM flyback converter, the energy stored in the primary inductance of the flyback transformer is delivered entirely to the output. The maximum primaryinductance value for which the converter remains in DCM at all operating conditions can be calculated as:

(Eq. 1) 
Where D_{MAX} is chosen as 0.43 for the MAX17595/MAX17596, V_{D} is the voltage drop of the output rectifier diode on the secondary winding, and F_{SW} is the switching frequency of the power converter. Choose the primary inductance value to be less than L_{PRIMAX}.
Duty Cycle Calculation
The accurate value of the duty cycle (DNEW) for the selected primary inductance (L_{PRI}) can be calculated using the following equation:

(Eq. 2) 
Turns Ratio Calculation (N_{S}/N_{P})
Transformer turns ratio (K = N_{S}/N_{P}) can be calculated as:

(Eq. 3) 
Peak/RMS Current Calculation
Primary and secondary RMS currents and primary peak current calculations are needed to design the transformer in switchedmode power supplies. Also, primary peak current is used in setting the current limit. Use the following equations to calculate the primary and secondary peak and RMS currents.
Maximum primary peak current, 
(Eq. 4) 
Maximum primary RMS current, 
(Eq. 5) 
Maximum secondary peak current, 
(Eq. 6) 
Maximum secondary RMS current, 
(Eq. 7) 
For the purpose of current limit setting, the peak current may be calculated as follows:
I_{LIM} = I_{PRIPEAK} × 1.2 
(Eq. 8) 
Primary Snubber Selection
Ideally, the external MOSFET experiences a drainsource voltage stress equal to the sum of the input voltage and reflected voltage across the primary winding during the OFF period of the MOSFET. In practice, parasitic inductors and capacitors in the circuit, such as leakage inductance of the flyback transformer, cause voltage overshoot and ringing in addition to the ideally expected voltage stress. Snubber circuits are used to limit the voltage overshoots to safe levels within the voltage rating of the external MOSFET. The snubber capacitor can be calculated using the following equation:

(Eq. 9) 
Where L_{LK} is the leakage inductance that can be obtained from the transformer specifications (usually 1% to 2% of the primary inductance).
The power that must be dissipated in the snubber resistor is calculated using the following formula:
P_{SNUB} = 0.833 × L_{LK} × I_{PRIPEAK}² × F_{SW} 
(Eq. 10) 
The snubber resistor is calculated based on the equation below:

(Eq. 11) 
The voltage rating of the snubber diode is:
V_{DSNUB} = V_{INMAX} + (2.5 × V_{OUT}/K) 
(Eq. 12) 
Output Capacitor Selection
X7R ceramic output capacitors are preferred in industrial applications due to their stability over temperature. The output capacitor is usually sized to support a step load of 50% of the rated output current in nonisolated applications so that the output voltage deviation is contained to 3% of the rated output voltage. The output capacitance can be calculated as follows:

(Eq. 13) 

(Eq. 14) 
The output capacitor RMS current rating can be calculated as follows:

(Eq. 15) 
Where I_{STEP} is the load step, T_{RESPONSE} is the response time of the controller, ΔV_{OUT} is the allowable output voltage deviation, and F_{C} is the target closedloop crossover frequency. F_{C} is chosen to be 1/10 of the switching frequency F_{SW}. For the flyback converter, the output capacitor supplies the load current when the main switch is on, and therefore the output voltage ripple is a function of load current and duty cycle. Use the following equation to calculate the output capacitor ripple:

(Eq. 16) 
Where I_{OUT} is load current and DNEW is the duty cycle at minimum input voltage.
Input Capacitor Selection
The MAX17595 is optimized to implement offline ACDC converters. In such applications, the input capacitor must be selected based on either the ripple due to the rectified line voltage, or based on holduptime requirements. Holdup time can be defined as the time period over which the power supply should regulate its output voltage from the instant the AC power fails. The MAX17596 is useful in implementing lowvoltage DCDC applications where the switchingfrequency ripple must be used to calculate the input capacitor. In both cases, the capacitor must be sized to meet RMS current requirements for reliable operation.
Capacitor Selection Based on Switching Ripple (MAX17596)
For DCDC applications, X7R ceramic capacitors are recommended due to their stability over the operating temperature range. The effective series resistance (ESR) and effective series inductance (ESL) of a ceramic capacitor are relatively low, so the ripple voltage is dominated by the capacitive component. For the flyback converter, the input capacitor supplies the current when the main switch is on. Use the following equation to calculate the input capacitor for a specified peaktopeak input switching ripple (V_{IN_RIP}):

(Eq. 17) 
The input capacitor RMS current in lowvoltage DCDC applications can be calculated as follows:

(Eq. 18) 
Capacitor Selection Based on Rectified Line Voltage Ripple (MAX17595)
For the flyback converter, the input capacitor supplies the input current when the diode rectifier is off. The voltage discharge on the input capacitor, due to the input average current, should be within the limits specified.
Assuming 25% ripple present on input DC capacitor, the input capacitor can be calculated as follows:

(Eq. 19) 
Where
P_{LOAD} = rated output power
η = typical efficiency at V_{AC,MIN} and I_{LOAD}
V_{IN,PK} = √2 × V_{AC,MIN} = peak voltage at minimum input AC voltage.
Capacitor Selection Based on Holdup Time Requirements (MAX17595)
For a given output power (P_{HOLDUP}) that needs to be delivered during holdup time (T_{HOLDUP}), the DC bus voltage at which the AC supply fails (V_{INFAIL}), and the minimum DC bus voltage at which the converter can regulate the output voltages (V_{INMIN}), the input capacitor (C_{IN}) is estimated as:

(Eq. 20) 
The input capacitor RMS current for ACDC applications can be calculated as:

(Eq. 21) 
External MOSFET Selection
MOSFET selection criteria include maximum drain voltage, peak/RMS current in the primary, and the maximum allowable power dissipation of the package without exceeding the junction temperature limits. The voltage seen by the MOSFET drain is the sum of the input voltage, the reflected secondary voltage on the transformer primary, and the leakage inductance spike. The MOSFETâ€™s absolute maximum VDS rating must be higher than the worstcase drain voltage:

(Eq. 22) 
The drain current rating of the external MOSFET is selected to be greater than the worstcase peak current limit setting.
Secondary Diode Selection
Secondarydiodeselection criteria includes the maximum reverse voltage, average current in the secondary, reverse recovery time, junction capacitance, and the maximum allowable power dissipation of the package. The voltage stress on the diode is the sum of the output voltage and the reflected primary voltage. The maximum operating reversevoltage rating must be higher than the worstcase reverse voltage:
V_{SECDIODE} = 1.25 × (K × V_{INMAX} + V_{OUT}) 
(Eq. 23) 
The current rating of the secondary diode should be selected so that the power loss in the diode (given as the product of forwardvoltage drop and the average diode current) should be low enough to ensure that the junction temperature is within limits. Select fastrecovery diodes with a recovery time less than 50ns, or Schottky diodes with low junction capacitance.
Error Amplifier Compensation Design
For nonisolated designs, output voltage feedback and the loop compensation network are connected as shown in Figure 1.
Figure 1. Loop compensation arrangement for nonisolated designs.
The loop compensation values are calculated as:

(Eq. 24) 
Where:

(Eq. 25) 
F_{SW} is the switching frequency.
CCM Flyback
Transformer Turns Ratio Calculation (K = N_{S}/N_{P})
The transformer turns ratio can be calculated using the following formula:

(Eq. 26) 
Where D_{MAX} is the duty cycle assumed at minimum input (0.43 for the MAX17595/MAX17596).
Primary Inductance Calculation
Calculate the primary inductance based on the ripple:

(Eq. 27) 
Where D_{NOM}, the nominal duty cycle at nominal operating DC input voltage V_{INNOM}, is given as:

(Eq. 28) 
The output current, down to which the flyback converter should operate in CCM, is determined by selection of β in Equation 27. For example, β should be selected as 0.15 so that the converter operates in CCM down to 15% of the maxim output load current. The ripple in the primary current waveform is a function of the duty cycle; maximum ripple occurs at the maximum DC input voltage. Therefore, the maximum (worstcase) load current down to which the converter operates in CCM occurs at the maximum operating DC input voltage. V_{D} is the forward drop of the selected output diode at maximum output current.
Peak and RMS Current Calculation
Primary and secondary RMS currents and primary peak current calculations are needed to design the transformer in switchedmode power supplies. Also, primary peak current is used in setting the current limit. Use the following equations to calculate the primary and secondary peak and RMS currents.
Maximum primary peak current:

(Eq. 29) 
Maximum primary RMS current:

(Eq. 30) 
Where ΔI_{PRI} is the ripple current in the primary current waveform, and is given by:

(Eq. 31) 
Maximum secondary peak current:
I_{SECPEAK} = I_{PRIPEAK}/K 
(Eq. 32) 
Maximum secondary RMS current:

(Eq. 33) 
Where ΔI_{SEC} is the ripple current in the secondary current waveform, and is given by:

(Eq. 34) 
For the purpose of currentlimit setting, the peak current can be calculated as follows:
I_{LIM} = I_{PRIPEAK} × 1.2 
(Eq. 35) 
Primary RCD Snubber Selection
The design procedure for primary RCD snubber selection is identical to that outlined in the
DCM Flyback section.
Output Capacitor Selection
X7R ceramic output capacitors are preferred in industrial applications due to their stability over temperature. The output capacitor is usually sized to support a step load of 50% of the rated output current in nonisolated applications so that the outputvoltage deviation is contained to 3% of the rated output voltage. The output capacitance can be calculated as:

(Eq. 36) 

(Eq. 37) 
The output capacitor RMS current rating can be calculated as follows:

(Eq. 38) 
Where I_{STEP} is the load step, T_{RESPONSE} is the response time of the controller, ΔV_{OUT} is the allowable output voltage deviation, and F_{C} is the target closedloop crossover frequency. F_{C} is chosen to be less than 1/5 of the worstcase (lowest) RHP zero frequency F_{RHP}. The right halfplane zero frequency is calculated as follows:

(Eq. 39) 
For the CCM flyback converter, the output capacitor supplies the load current when the main switch is on, and therefore, the outputvoltage ripple is a function of load current and duty cycle. Use Equation 40 to estimate the outputvoltage ripple:

(Eq. 40) 
Input Capacitor Selection (MAX17596)
Use Equation 41 to calculate the input capacitor for a specified peaktopeak input switching ripple (V_{IN_RIP}) in lowvoltage DCDC converters operating in CCM mode.

(Eq. 41) 

(Eq. 42) 
Error Amplifier Compensation Design
For nonisolated designs, the output voltage feedback and loop compensation network are connected as shown in Figure 1.
In the CCM flyback converter, the primary inductance and the equivalent load resistance introduces a right halfplane zero at the following frequency:

(Eq. 43) 
The loop compensation values are calculated as:

(Eq. 44) 
Where FP, the pole due to output capacitor and load, is given by:

(Eq. 45) 
The above selection of R_{Z} sets the loopgain crossover frequency (F_{C}, where the loop gain equals 1) equal to 1/5 the righthalf plane zero frequency.
With the control loop zero placed at the load pole frequency:

(Eq. 46) 
With the highfrequency pole placed at half the switching frequency:

(Eq. 47) 
Isolated Flyback with Optocoupler Feedback
Optocoupler feedback is used in isolated flyback converter designs for precise control of isolated output voltage. This section describes the different configurations of a controller and outlines a general procedure to calculate compensating network component values. Flyback converter designs, operating in both DCM and CCM, are covered.
The overall scheme of optocoupler feedback is shown in Figure 2.
Figure 2. Optocoupler feedback for isolated flyback designs.
Use R_{FB} = 470Ω (typical), for an optocoupler transistor current of 1mA. Select R_{1} = 49.9kΩ and R_{2} = 22kΩ (typical values), to use the full range of available COMP voltage. U3 is a lowvoltage adjustable shunt regulator with a 1.24V reference voltage. Calculate R_{LED} using Equation 48, based on output voltage V_{OUT}.
R_{LED} = 400 × CTR × (V_{OUT}  2.7)Ω 
(Eq. 48) 
The bandwidth of typical optocouplers limits the achievable closed loop bandwidth of optoisolated converters. And in CCM flyback designs, the presence of righthalfplane (RHP) zero limits the practical bandwidth of the closedloop system. Considering these limitations, the closedloop crossover frequency may be chosen, at the nominal input voltage as follows:
ƒ_{C} = 5kHz, for DCM designs 
(Eq. 49) 
Or ƒ_{C} = ƒ_{ZRHP}/10, for CCM designs, limited to ƒ_{C} = 5kHz 
(Eq. 50) 
Closedloop compensation values are designed based on the openloop gain at the desired crossover frequency, ƒ_{C}. The openloop gains in DCM and CCM, at ƒ_{C}, are calculated using the following expressions.
Or ƒ_{C} = ƒ_{ZRHP}/10, for CCM designs, limited to ƒ_{C} = 5kHz 
(Eq. 50) 
, for DCM designs 
(Eq. 51) 
And
, for CCM designs 
(Eq. 52) 
Where
K = N_{S}/N_{P} is the transformer turns ratio
ƒ_{P} = I_{OUT}/(π × V_{OUT} × C_{OUT}), for DCM designs
And
, for CCM designs 
Three controller configurations are suggested, based on openloop gain and the value of R_{LED}. For typical designs, the current transfer ratio (CTR) of the optocoupler designs can be assumed to be unity. It is known that the comparator and gate driver delays associated with the input voltage variations affects the optocoupler CTR. Depending on the optocopler selected, variations in CTR causes wide variations in bandwidth of the closedloop system across the inputvoltage operating range. It is recommended to select an optocoupler with less CTR variations across the operating range.
Configuration 1: 

(Eq. 53) 
The schematic for this controller configuration is depicted in Figure 3.
Figure 3. Controller configuration 1.
Configuration 2: 

(Eq. 54) 
The schematic for this controller configuration is depicted in Figure 4.
Figure 4. Controller configuration 2.
Configuration 3: 

(Eq. 55) 
The schematic for this controller configuration is depicted in Figure 5.
Figure 5. Controller configuration 3.
Bias Winding Supply Configuration
The MAX17595 is implemented with a 20V V
_{IN} UVLO wakeup level with 13V hysteresis to optimize the size of bias capacitor. A simple RC circuit is used to start up the MAX17595. To sustain the operation of the circuit, the input supply to the IC is bootstrapped through diode D2 as shown in
Figure 6 (refer to the
MAX17595–7 data sheet to design the startup network).
Figure 6. IN supply configuration for an offline isolated design.
Turns Ratio Calculation (N_{B}/N_{P})
The transformer turns ratio (K_{B} = N_{B}/N_{P}) can be calculated as follows:

(Eq. 56) 
Bias Capacitor (C_{START}) Calculation
In isolated applications where a bias winding configuration is used to power up MAX17595/MAX17596, C_{START} can be calculated as follows:
C_{START} = 0.75 × (C_{DRV} + 0.1 × I_{IN} × T_{SS} + 0.04 × T_{SS} × Q_{G} × F_{SW}) 
(Eq. 57) 
Feedback Potential Divider Selection (R_{U}, R_{B})
For all the applications that use a startup network to bias IN pin during the powerup sequence, calculate the feedback potential divider using the following formulas.

(Eq. 58) 

(Eq. 59) 
Where V_{REF} is the reference set by the secondary side controller (e.g., V_{REF} = 1.24V for TLV431)
C_{START} is the startup capacitor, C_{DRV} is the cumulative capacitor used at the DRV pin, I_{IN} is the MAX17595 quiescent current, T_{SS} is the softstart time, V_{OUT} is the output voltage, C_{OUT} is the output capacitor used, and Q_{G} is the gate charge of the primary nchannel MOSFET.
The bias winding configuration is not needed in lowvoltage DCDC applications where the input voltage can be directly used for IC supply, as shown in Figure 7. Using the input supply directly for the IC eliminates the external RC startup network and bias winding circuit. The MAX17596 is optimized for such lowvoltage DCDC applications with UVLO V_{IN} wakeup level of 4.1V (typ) with 200mV hysteresis. In such applications where bias winding is not used, the feedback potential divider may be chosen as follows:
Choose R_{B} = 10kΩ (typ)

(Eq. 60) 
Figure 7. The IN supply configuration for lowvoltage isolated DCDC designs.
Typical Operating Circuit
More detailed image (PDF, 304kB)
Figure 8. The MAX17595 typical application circuit.
Design Calculations for the MAX17595Based Isolated DCM Flyback Converter
Technical Specifications
Input voltage range: 85VAC to 265VAC
Output voltage: 15V
Rated output current: 1.5A
Switching frequency: 120kHz
Operating mode: Discontinuous Conduction Mode (DCM)
 Primary inductance selection
In offline applications, the DC bus voltage varies from 120VDC to 375VDC. But the actual minimum input operating voltage depends on the 100Hz ripple present on the DC bus capacitor. In this application, the ripple is assumed to be 30V and hence the minimum DC input to the converter is 90V.
Where V_{INMIN} = 90V, D_{MAX} = 0.43, V_{D} = 0.8V
Select primary inductance L_{PRI} = 190µH to account for 10% tolerance on primary inductance.
 Maximum duty cycle calculation with selected L_{PRI}
 Turns ratio calculation (K = N_{S}/N_{P})
 Peak/RMS current calculation
 Primary snubber selection
Where leakage inductance L_{LK} = 1.9µH (1% of L_{PRI})
Considering the derating of the snubber capacitor, select C_{10} = 3.3nF.
P_{R18} = 0.833 × L_{LK} × I_{PRIPEAK}² × F_{SW} = 0.47W 
 Output capacitor selection
F_{C} = 5kHz, typical bandwidth at nominal voltage for isolated applications
I_{STEP} = 0.25 × I_{OUT} = 0.375A (25% of I_{LOAD}, typical for isolated applications)
ΔV_{OUT} = 450mV (3% of V_{OUT}, typical)
Actual output capacitance used in the application is:
C_{13,14,15,16} = 30µF (with 22µF/25V × 4 capacitors after derating)
Note: Capacitor values change with temperature and applied voltage. Refer to capacitor data sheets to select capacitors that guarantee the required output capacitance across the operating range. For design calculations, use the worstcase derated value of capacitance, based on temperature range and applied voltage.
 Input capacitor selection based on 100Hz ripple on DC bus voltage
η = 0.85 (typical efficiency)
P_{LOAD} = 15 × 1.5 = 22.5W
V_{IN,PK} = √2 × 85 = 120V
 External MOSFET selection
 Secondary diode selection
V_{D4} = 1.25 × (K × V_{INMAX} + V_{OUT}) = 140V
 Bias winding supply configuration
For offline applications, bias supply configuration as shown in Figure 6 is used to power up the MAX17595.
Use V_{BIAS} = 12V, V_{D2} = 0.8V, V_{D1} = 0.8V, K = 0.24, C_{DRV} = 1µF, I_{IN} = 2mA, Q_{G} = 35nC (STB11NM80), R1 = 49.9kΩ,
R2 = 22kΩ for the following calculations.
Select softstart time T
_{SS} = 12ms (refer to the
MAX17595/MAX17596/MAX17597 data sheet for programming softstart time).
 Outputvoltage softstart time calculation
In isolated designs, the outputvoltage softstart time depends on the values of T_{SS}, R1, and R2 and can be calculated as follows:
Note: The above equation provides an approximate outputvoltage softstart time. Due to the presence of the optocircuit, the actual softstart may be different from the programmed softstart time. It is recommended to adjust the softstart capacitor to get the required softstart time.
 Bias turns ratio selection (K_{B} = N_{B}/N_{P})
 Startup capacitor selection
C_{9} = 0.75 × (C_{DVR} + 0.1 × I_{IN} × T_{SS} + 0.04 × T_{SS} × Q_{G} × F_{SW}) = 4µF
Note: Usually the bias voltage is in the range of 12V to 20V, so it is suggested to consider the derating of the startup capacitor. Improper selection of the C_{START}, R_{L}, and R_{U} may result in an unnecessary power up sequence if IN supply falls below the UVLO lower threshold during circuit operation.
 Feedback potential divider selection
Select R_{29} = 221Ω
 Isolated flyback with optoisolated feedback compensation design
Choose V_{IN} = 325VDC, R1 = 49.9kΩ, R2 = 22kΩ, R_{FB} = 470Ω, CTR = 1 (all typical values)
R_{CS} = 0.2Ω
R_{26} = 400 × CTR × (V_{OUT}  2.7)Ω = 4.9kΩ
Choose f_{C} = 5kHz (typical, at nominal input voltage of 325VDC)
Since the loop gain is less than 1.2, the third configuration shown in the isolated compensation design should be used for this application.
Select C_{17} = 68nF
Select C_{4} = 56pF
Bill of Materials 
Designation 
Qty 
Description 
C1 
1 
0.1µF 20% 275VAC X2 plastic film capacitor (17mm x 5mm) Panasonic ECQU2A104ML 
C4 
1 
56pF 5% 50V C0G ceramic capacitor (0603) Murata GRM1885C1H560J 
C5 
1 
100µF 20% 450V aluminium electrolytic capacitor (25mm diameter) Panasonic ECOS2GP101CA 
C6, C21 
2 
0.47µF 10% 25V X7R ceramic capacitors (0603) Murata GRM188R71E474K 
C7 
1 
0.1µF 10% 16V X7R ceramic capacitor (0603) Murata GRM188R71C104K 
C8 
1 
1µF 10% 25V X7R ceramic capacitor (0603) Murata GRM188R71E105K 
C9 
1 
4.7µF 10% 50V X7R ceramic capacitor (1206) Murata GRM31CR71H475K 
C_{10} 
1 
3300pF 10% 250V X7R ceramic capacitor (0805) Murata GRM21AR72E332K 
C11 
1 
1000pF 10% 50V X7R ceramic capacitor (0603) Murata GRM188R71H102K 
C13, C14, C15, C16 
4 
22µF 10% 25V X7R ceramic capacitors (1210) Murata GRM32ER71E226K 
C17 
1 
68nF 10% 50V X7R ceramic capacitor (0603) TDK C1608X7R1H683K 
D1 
1 
600V 1.5A bridge rectifier (DFS) Diodes Inc. DF1506S 
D2 
1 
100V 300mA fast switching diode (SOD123) Diodes Inc. 1N4148W7F 
D3 
1 
800V 1A ultrafast rectifier (SMA) Diodes Inc. US1KTP 
D4 
1 
200V 6A ultrafast recovery rectifier (PowerDI 5) Diodes Inc. PDU62013 
L1 
1 
6.8mH 0.8A line filter (13mm x 10mm) Panasonic® ELF15N008A 
N1 
1 
800V 11A Nchannel MOSFET (D2PAK) ST Micro STB11NM80T4 
R1 
1 
10Ω 2A NTC thermistor (5mm) EPCOS B57153S0100M000 
R2, R3, R4 
3 
549kΩ 1% resistors (1206) 
R5 
1 
19.8kΩ 1% resistor (0603) 
R6 
1 
4.99kΩ 1% resistor (0603) 
R9 
1 
82.5kΩ 1% resistor (0603) 
R12 
1 
49.9kΩ 1% resistor (0603) 
R13 
1 
22kΩ 1% resistor (0603) 
R14, R15, R16 
3 
402kΩ 1% resistors (1206) 
R18 
2 
100kΩ 5% resistors (1206) Panasonic ERJP08J104V 
R19 
1 
10Ω 1% resistor (0603) 
R20 
1 
100Ω 1% resistor (0603) 
R21 
1 
0.2Ω 1% resistor (1206) Panasonic ERJ8BSFR20V 
R22 
1 
470Ω 1% resistor (0603) 
R26 
1 
4.99kΩ 1% resistor (0603) 
R28 
1 
2.49kΩ 1% resistor (0603) 
R29 
1 
221Ω 1% resistor (0603) 
T1 
1 
180µH, 0.8A, 1:0.24:0.2 transformer (EFD25) Coilcraft® MA5475AL 
U1 
1 
Peakcurrentmode controller for flyback regulator (16TQFN 3mm x 3mm x 0.8mm) Maxim MAX17595ATE+ 
U2 
1 
Phototransistor (6DIP) Avago™ 4N35300E 
U3 
1 
Shunt regulator 1.24V 0.5% (SOT233) Diodes Inc. TLV431BFTA 
NOTE: The design methodology for isolated fly back converter using MAX17596 is same as the MAX17595.
Avago is a trademark of Avago Technologies, Inc.
Coilcraft is a registered trademark of Coilcraft, Incorporated.
Panasonic is a registered trademark and registered service mark of Panasonic Corporation.
© Nov 27, 2012, Maxim Integrated Products, Inc.

The content on this webpage is protected by copyright laws of the United States and of foreign countries. For requests to copy this content, contact us.
APP 5504: Nov 27, 2012
APPLICATION NOTE 5504,
AN5504,
AN 5504,
APP5504,
Appnote5504,
Appnote 5504
