APPLICATION NOTE 4104

Understanding and Configuring the 1-Wire® Timing of the DS2480B


Abstract: The DS2480B is a 1-Wire master (driver) with UART host interface. This driver is optimized for power delivery and supports overdrive speed in embedded applications. A special feature of the DS2480B is its flexible speed mode, which allows the designer to configure the 1-Wire timing at standard speed. This application note explains how to determine the optimum timing configuration settings and how to write the settings to the chip using Windows® software. The article also compares the driver strength of the DS2480B to a resistive pullup, as described in application note 3829. The first appendix explains how the optimum set of configuration parameters was determined. A second appendix describes an algorithm to estimate the number of slaves that the DS2480B can drive, depending on the electrical characteristics of the master and the capacitive load of the network cabling. The third appendix discusses network overload conditions.

Introduction

The DS2480B is a 1-Wire master (driver) with UART host interface. Optimized for power delivery and supporting overdrive speed in embedded applications, it relieves the host from the duty of generating time-critical 1-Wire waveforms. This document discusses the configurability and performance of the DS2480B. For guidance on host software development including flow charts, pseudo code, and a 'C' implementation see application note 192, "Using the DS2480B Serial 1-Wire® Line Driver."

The DS2480B uses active circuitry to shorten the recovery time at the end of time slots. Figure 1 shows a simplified schematic of the 1-Wire driver section.

Figure 1. Simplified drawing of the DS2480B 1-Wire driver circuit.
Figure 1. Simplified drawing of the DS2480B 1-Wire driver circuit.

When the 1-Wire line is idle, the DS2480B driver performs the pullup through a controlled current source. This current source can be switched off (during pulldown), provide weak pullup (IWEAKPU after pulldown and when idle), or provide an active pullup (IACTPU during rising edges). The pulldown circuit (Q1) implements a slew rate that can be adjusted through software. Q2 represents the power delivery circuit used by 1-Wire slave functions that require high current, such as EEPROM programming or performing temperature conversion. The function of Q2 is not discussed in this application note.

To support configurations with significant cabling, an external line termination resistor, RT (~100Ω), is needed to minimize transmission line effects such as reflections, undershoot, and overshoot. However, a consequence of adding RT is that the active pullup can turn off prematurely before the 1-Wire line is fully recharged at the slave device(s). This can happen because the DS2480B senses voltage at its 1-Wire pin rather than the slave side of the 1-Wire network. The slave side will be lower than the 1-Wire pin by the voltage drop across RT when the pin reaches an internal threshold (typically IACTPU × RT = 15mA × 100Ω = 1.5V). Crossing this threshold starts a timer that must expire before the active pullup is turned off. But since the timer starts early, it also ends early. Nevertheless, after the active pullup turns off (early), the 1-Wire line will continue to charge with the weak pullup current, IWEAKPU, until it is fully recharged.

Critical Parameters

In very simple terms, a 1-Wire network can be compared to a lossy capacitor that is charged and discharged as communication occurs. Consequently, anything that affects the process of charging and discharging the network is a parameter that must be considered when determining the driver performance. The critical hardware-defined parameters that characterize the DS2480B driver are:
  • 1-Wire Weak Pullup Current, IWEAKPU
  • 1-Wire Active Pullup Current, IACTPU
  • Active Pullup on Threshold, VIAPO
  • Active Pullup Timer Threshold, VIAPTO
  • Active Pullup on Time, tAPUOT (2.0µs at standard speed, 0.5µs at overdrive)
With the exception of tAPUOT, all these parameters vary to some extent from manufacturing lot to lot and for different temperature operating conditions. Since IWEAKPU and IACTPU depend on the same physical effects, they track each other. Simply stated, if IWEAKPU is higher than typical, then IACTPU will be higher too. Therefore, the ratio between IWEAKPU and IACTPU varies little. The threshold voltages, VIAPO and VIAPTO, can vary independently of each other and are not correlated to changes of the pullup currents. For the actual specification values, refer to the DS2480B data sheet. IWEAKPU is measured at a residual voltage of 0.4V on the 1-Wire pin. The DC parameters ΔVSTRPU and ΔVPROG, also found in the data sheet, do not apply to the active pullup that only occurs during a rising edge on the 1-Wire side. Rather, ΔVSTRPU and ΔVPROG refer to a voltage drop between either VDD and 1-Wire or VP-P and 1-Wire during a strong pullup (SPU, power delivery) or EPROM programming pulse.

1-Wire Master Timing Configurability

The DS2480B offers flexible speed mode, which is a variant of standard speed. This special flexible speed mode allows fine-tuning of the timing for the 1-Wire time slots. The timing of a reset-/presence-detect sequence is fixed. Timing parameters that can be set by writing to control registers are:
  • Write 1 Low Time (tLOW1)
  • Data Sample Offset (tDSO)
  • Write 0 Recovery Time (tREC0)
  • Slew Rate of Falling Edges (DS2480B initiated)
Table 1 shows the available ranges and increments for these timing parameters in flexible speed mode only. The parameter codes and value codes are used in conjunction with the DS2480B's configuration commands. Table 2 shows parameters that are fixed (invariable) at flexible speed and parameters for overdrive speed.

Table 1. Variable Parameters: Flexible Speed Only
Description Symbol Par. Code Parameter Value Codes and Values Units
000 001 010 011 100 101 110 111
Write 1 Low Time tLOW1 100 8 9 10 11 12 13 14 15 µs
Data Sample Offset, Write 0 Recovery Time tDSO, tREC0 101 3 4 5 6 7 8 9 10 µs
Pulldown Slew Rate 001 15 2.2 1.65 1.37 1.1 0.83 0.7 0.55 V/µs

Table 2. Fixed Parameters: Flexible and Overdrive Speeds
Description Symbol Value (µs) Speed
Write 1 High Time tHIGH1 49 Flexible
8 Overdrive
Write 0 Low Time tLOW0 57 Flexible
7 Overdrive
Active Pullup On-Time tAPUOT 2 Flexible
0.5 Overdrive
Write 1 Low Time tLOW1 1 Overdrive
Data Sample Offset tDSO 1 Overdrive
Write 0 Recovery Time tREC0 3 Overdrive

The same register value controls both the Data Sample Offset and Write 0 Recovery Time parameters. This is permissible since both parameters are driven by the same effect, the recharge speed of the 1-Wire network. There is no need to sample the 1-Wire before logic 1 could have been reached (tDSO function). Conversely, a waiting time that is adequate to fully recharge the 1-Wire line during a Read time slot serves well as recovery time for a Write 0 time slot (tRECO function).

As illustrated in Figure 2, the Write 1 and Read Data time slots are constructed from three segments: tLOW1, tDSO, and tHIGH1. The duration of tLOW1 can be set from 8µs to 15µs. With a tDSO range from 3µs to 10µs and a fixed tHIGH1 of 49µs, the duration of a Write 1 or Read Data time slot can be anywhere from 60µs to 74µs. The sampling to read from the 1-Wire (in case of a Read time slot) takes place at tLOW1 + tDSO after the beginning of the time slot, i.e., anywhere from 11µs to 25µs from the beginning of the falling edge.

Figure 2. Write 1 and Read Data time slots.
Figure 2. Write 1 and Read Data time slots.

A Write 0 time slot (Figure 3) consists of the two segments, tLOW0 and tRECO. With a fixed tLOW0 of 57µs and a tRECO range from 3µs to 10µs, a Write 0 time slot can last from 60µs to 67µs. Depending on the data that the DS2480B receives from the host's UART, there can be significant idle time between time slots.

Figure 3. Write 0 time slot.
Figure 3. Write 0 time slot.

The instant at which a 1-Wire slave recognizes a time slot depends on three factors: the slew rate of the falling edge of the master pulldown; the slave's electrical characteristics; and the physical distance between master and slave. In flexible speed mode the slew rate can be adjusted from a fast 15V/µs down to a slow 0.55V/µs. A very slow slew rate can, however, conflict with a short tLOW1 setting. Extensive tests have shown that a slew-rate setting of 1.37V/µs is a good starting point, and works in almost all applications with and without line termination. The fastest setting (15V/µs) should be avoided unless the line is properly terminated. Without termination, there is significant likelihood of ringing, particularly if the DS2480B drives a long cable.

How to Change the Settings

As shown in the Appendix A, "Choosing Configuration Parameter Values," the optimal configuration is a time slot duration of 66µs with tLOW1 = 8µs and tDSO = 9µs.

An executable Windows utility program, tmline.exe, to change the settings can be downloaded (ZIP). This file must first be extracted from the ZIP folder and moved to the Windows desktop. To run the program, double-click its icon or right click the icon and select "open." The program opens a DOS-like window and performs several tasks: introduces itself; identifies the revision of the underlying driver software; and displays the default settings for Pulldown Slew Rate, Write 1 Low Time, and Data Sample Offset/Write 0 Recovery Time. If 1-Wire application software is already running at the time where the tmline program is started, the displayed settings are the current settings.
Current (STANDARD) 1-Wire line settings:
 PDSR  = 1.37 V/us
 W1LT  = 8 us
 DSOW0 = 6 us
The first parameter for which tmline requests user input is the Pulldown Slew Rate. The number to be entered is the parameter value code, found in Table A. Numeric values from 0 to 7 select the new value; entering an 8 exits the program without changing the settings. All other inputs are ignored.
Select the PDSR (pulldown slew rate):
 0) 15 V/us
 1) 2.20 V/us
 2) 1.65 V/us
 3) 1.37 V/us
 4) 1.10 V/us
 5) 0.83 V/us
 6) 0.70 V/us
 7) 0.55 V/us
 8) EXIT

Enter number: 3
(Example user input: 3)

After a valid number is entered, the next parameter to be specified is Write 1 Low Time.
Select the W1LT (write-1 low time):
 0) 8 us
 1) 9 us
 2) 10 us
 3) 11 us
 4) 12 us
 5) 13 us
 6) 14 us
 7) 15 us
 8) EXIT

Enter number: 0
(Example user input: 0)

After a new Write 1 Low Time is entered, the last parameter for user input is Data Sample Offset/Write 0 Recovery Time.
Select the DSO/WOR (data sample offset/write 0 recovery):
 0) 3 us
 1) 4 us
 2) 5 us
 3) 6 us
 4) 7 us
 5) 8 us
 6) 9 us
 7) 10 us
 8) EXIT

Enter number: 6
(Example user input: 6)

After a valid number is entered, tmline writes the new set of parameters to the DS2480B in the port adapter. It then loops back to display the new settings as the current ones and asks for a new pulldown slew rate. To exit the program, enter "8." The new setting remains valid as long as the 1-Wire application software is running.

Recovery Time for Multiple Slave 1-Wire Networks

Standard Speed Mode

For a single-slave network in standard speed mode, the 1-Wire slave data sheets typically specify a minimum recovery time of 5µs in conjunction with a 2.2kΩ pullup resistor and a minimum pullup voltage of 2.8V. Maxim's application note 3829, "Determining the Recovery Time for Multiple-Slave 1-Wire Networks," explains how to determine the recovery time for multiple slaves, four temperatures, and two voltages. Since the DS2480B is a 5V device, the 4.5V section of application note 3829 is relevant. For temperatures of -5°C and warmer, the recovery time at standard speed is specified as 2 × N + 1µs (N = number of slaves). Accordingly for one slave, one needs 3µs, for two slaves 5µs, for three slaves 7µs, and for four slaves 9µs.

Therefore, using the calculations for worst-case conditions (1.5mA IWEAKPU, 7mA IACTPU) from the Appendix B and the configuration of "four slaves with 9µs" as references, the DS2480B can handle at least 26 slaves. Consequently, at standard speed the DS2480B driver is at least six and a half times as strong as the 2.2kΩ passive pullup.

Overdrive Speed Mode

For a single-slave network in overdrive speed mode, the 1-Wire slave data sheets typically specify a minimum recovery time of 2µs in conjunction with a 2.2kΩ pullup resistor and a minimum pullup voltage of 2.8V. According to application note 3829 cited above, for -5°C temperatures and warmer, the recovery time at overdrive speed is specified as 1.37 × N + 0.5µs (N = number of slaves). Accordingly, for one slave one needs 1.87µs, for two slaves 3.24µs, for three slaves 4.61µs, and for four slaves 5.98µs.

Therefore, by using the condition "two slaves with 3.24µs" as a reference and scaled to 1.8 slaves at 3µs, and then by performing the same calculation for a worst-case condition at overdrive speed, the DS2480B can handle at least seven slaves. Consequently, at overdrive speed the DS2480B driver is at least four times as strong as the 2.2kΩ passive pullup.

What Happens If the Number of Slaves Exceeds the Recommendations?

The answer to the above question is straightforward: the network will probably continue functioning. This is true because:
  • VIAPTO is usually higher than the worst case assumed for the calculation.
  • The slaves tolerate incomplete recharge as long as the voltage rises high enough to be recognized as the end of the time slot.
  • VIH1 of the DS2480B is probably lower than the minimum specification in the data sheet.
Nonetheless, the robustness of the communication will suffer, resulting in retries that appear as a slower response or in reduced throughput.

Summary

The reliability of a 1-Wire network depends equally on master (driver) and slaves. For operation at standard speed, the DS2480B 1-Wire driver's optimal setup is flexible speed with tLOW1 = 8µs, tDSO = tRECO = 9µs. The slew-rate setting of 1.37V/µs is a good start. This setup accommodates 1-Wire slaves in the speed range of 15µs to 54µs. A single slave with a time base slower than 54µs can make the system nonfunctional. Changing the pulldown slew rate to 1.65V/µs or 2.2V/µs increases the chance for a "borderline" slave to function in the network. To accommodate 1-Wire slaves as slow as 60µs, the duration of tHIGH1 and tLOW0 must be increased by 6µs to 55µs and 63µs, respectively. This latter capability, however, is not yet available with the current revision of the DS2480B.

As an example, consider the free OneWireViewer which uses the 1-Wire drivers for Windows. The OneWireViewer software uses the configuration tLOW1 = 8µs, tDSO = 6µs, and a slew rate of 1.37V/µs as default for standard speed. As explained above, it might be necessary to increase tDSO to 9µs. OneWireViewer revisions 4.01 and newer changed the default tDSO to 9µs, thus matching the recommendation in this application note. The defaults for tLOW1 and the slew rate remain at 8µs and 1.37V/µs, respectively.

The DS2480B is a strong 1-Wire driver. At standard speed the DS2480B can drive at least six and a half times and at overdrive speed four times as many slaves as a circuit that relies on a 2.2kΩ pullup resistor.

Appendix A

Choosing Configuration Parameter Values

Comprised of the three segments, tLOW1, tDSO, and tHIGH1, the Write 1 and Read Data time slots can have 64 variations, as shown in Table 3. The longer tDSO is (alias tRECO for Write 0 times slots), the more time is available for network recharge (recovery). A combination of maximum settings for tLOW1 and tDSO, however, positions the sampling point up to 25µs into the time slots. The sampling point is where the DS2480B reads from the 1-Wire line.

Table 3. Time Slot Duration as Function of tLOW1 and tDSO
tLOW1 (µs) tDSO (µs)
3 4 5 6 7 8 9 10
8 60 61 62 63 64 65 66 67
9 61 62 63 64 65 66 67 68
10 62 63 64 65 66 67 68 69
11 63 64 65 66 67 68 69 70
12 64 65 66 67 68 69 70 71
13 65 66 67 68 69 70 71 72
14 66 67 68 69 70 71 72 73
15 67 68 69 70 71 72 73 74

The internal time base of 1-Wire slaves can vary from 15µs to 60µs. Therefore, a slave device that responds with a 0 can stop pulling the line low as soon as 15µs after it recognizes the beginning of the time slot. With a slew-rate setting of 1.37V/µs (nominal value), the slave might recognize the time slot and start its timer at ~2.2V or ~2µs into tLOW1. To ensure that one still can read a 0 from such a fast slave, the sampling point must not be later than 2 + 15 = 17µs from the beginning of the time slot. All time slots that are no longer than 66µs meet this condition. Another slave might recognize the time slot and start its timer at ~0.8V or ~3µs into tLOW1 and stop pulling the line low 60µs later. In this case the 1-Wire line can start recharging 63µs after the beginning of a time slot. To allow for a minimum recovery time of 3µs, the time slot duration needs to be minimally 66µs. A faster slew rate moves the points where slaves turn on their timers closer together. This can slightly improve the recovery time, but also add ringing if there is no line termination at the driver.

What happens if the Write 1 and Read Data time slot is different from 66µs? A shorter duration is acceptable for fast 1-Wire slaves. However, for every µs less, the slowest slave that can be accommodated must be 1µs faster. In the extreme case of a 60µs time slot, the slowest slave that would still function in the network must not be slower than 54µs. A time-slot duration longer than 66µs is acceptable for slow 1-Wire slaves. However, for every additional µs, the fastest slave must be 1µs slower to remain readable in the network. In the extreme case of a 74µs time slot, the fastest slave that would still function must not be faster than 23µs. There is a small chance that some randomly chosen 1-Wire slaves do not meet this last condition. Therefore, time-slot choices of less than 64µs or more than 68µs are less reliable. Most 1-Wire slaves have a speed close to the center of the 15µs to 60µs range, and devices slower than 54µs are rare.

Since the value chosen for tDSO also applies to tRECO for recharge in Write 0 time slots, the highest possible value for tRECO is desirable. This high value identifies the pair tLOW1 = 8µs and tDSO = 9µs as the optimal configuration (highlighted in Table 3). Reviewing the Write 0 time slot from a slave's perspective, the slave might start its timer ~3µs into tLOW0 and read (sample) 60µs later. Since tLOW0 ends 57µs after the beginning of the time slot, the slave's sampling occurs 6µs late, near the end of tRECO. To guarantee that a slave does not miss the latest sampling point in a Write 0 time slot, its time base must not be slower than 54µs. This requirement also ensures that the shortest recovery time in a Read 0 case is the same as in the Write 0 time slot, i.e., 9µs.

Appendix B

How Many Slaves Can the DS2480B Drive?

There is no simple answer to this question. A 1-Wire slave does not behave like an ideal capacitor. However, to describe the behavior one can use a capacitor model with a low capacitance until a certain voltage and a high capacitance above this voltage. The high capacitance corresponds to the parasitic supply capacitor and applies when the slave's recharge begins.

To speed the recharge process, the DS2480B uses a 2-stage current source instead of a resistor. The recharge begins with the low IWEAKPU and later changes to the stronger IACTPU. The detailed view of a rising edge in Figure 4 illustrates the process.

Figure 4. Rising edge details.
Figure 4. Rising edge details.

At t1 the pulldown (master or slave) ends and the weak pullup current begins charging the 1-Wire line. The load on the bus and the IWEAKPU value of the DS2480B determine the slope. At t2 the voltage crosses the threshold voltage VIAPO. Now the DS2480B switches over to IACTPU, which is significantly higher. Consequently, the voltage on the 1-Wire line rises faster. As the voltage crosses the threshold VIAPTO at t3, a timer is started, which keeps the IACTPU flowing for another 2µs (tAPUOT, flexible speed) or 0.5µs (overdrive speed). After the timer expires, the IWEAKPU continues to power the 1-Wire bus until the DS2480B begins the next time slot or communication sequence.

The charging of a capacitor using a constant current source can be described as:

V(t) = ICHARGE × t/C (Eq. 1)
The time t2 where the VIAPO threshold is reached can be calculated by setting V(t) = VIAPO, substituting IWEAKPU for ICHARGE, and resolving equation (1) for t2:

t2 = C × VIAPO/IWEAKPU (Eq. 2)
At t2 the charge current changes from IWEAKPU to IACTPU and continues charging from VIAPO to VIAPTO and beyond. Expanding equation 2 accordingly yields t3, the time for a recharge to VIAPTO:

t3 = C × [(VIAPTO - VIAPO)/IACTPU + VIAPO/IWEAKPU] (Eq. 3)
To estimate the number of slaves that the DS2480B can drive it is necessary to split the recharge into three phases and analyze each phase separately.

Phase 1 Recharge from 0 to 3.6V, the lowest VIAPTO. The end of this phase approximately coincides with the beginning of the slave's recharge. The slave's low capacitance applies.
Phase 2 Recharge continues with IACTPU until tAPUOT expires. The slave's high capacitance applies.
Phase 3 Recharge continues with IWEAKPU until the next time slot begins. The slave's high capacitance applies.

The recharging duration of Phase 1 is calculated using equation 3. For Phase 2, use equation 1 and substitute IACTPU for ICHARGE and tAPUOT for t. This exercise yields the voltage increment that is achieved during the remaining time where IACTPU continues. For Phase 3, calculate the residual time available for recharge, and use equation 1 to determine the additional voltage increment that can be achieved with IWEAKPU. For a given number of slaves, if the addition of VIAPTO to the voltage increments from Phase 2 and 3 results in a value higher than or equal to the operating voltage, then a full recharge can be accomplished. The highest number of slaves that meets this condition is the desired result. This algorithm can be implemented as a spreadsheet with the number of slaves as a variable.

After completing the above calculations, the resulting number of slaves for flexible speed is 26. Note that this number is a conservative estimate. The actual achievable number of slaves could be significantly higher. The input parameter values in Table 4 were used to calculate the result.

Table 4. Values to Calculate Number of Slaves for Flexible Speed
Parameter Value Comment
Operating voltage 5V Nominal value
Slave low capacitance 50pF High estimate, actual value could be lower
Slave high capacitance 600pF Typical value
VIAPO threshold 1V Typical value
Phase 1 threshold 3.6V Lowest VIAPTO specification value
Weak pullup current 1.5mA Lowest IWEAKPU specification value
Active pullup current 7mA Lowest IACTPU specification value
Active current continuation 2µs The continuation timer starts at VIAPTO
Recovery time 9µs tRECO

Performing the same calculation for overdrive speed results in seven slaves. When considering cable capacitance, it is necessary to verify that the duration of Phase 1 does not exceed 1µs. Again, this number is a conservative estimate. The actual achievable number of slaves could be significantly higher. The parameter values in Table 5 were used to calculate the result.

Table 5. Values to Calculate Number of Slaves for Overdrive Speed
Parameter Value Comment
Operating voltage 5V Nominal value
Slave low capacitance 50pF High estimate, actual value could be lower
Slave high capacitance 600pF Typical value
VIAPO threshold 1V Typical value
Phase 1 threshold 3.6V Lowest VIAPTO specification value
Weak pullup current 1.5mA Lowest IWEAKPU specification value
Active pullup current 7mA Lowest IACTPU specification value
Active current continuation 0.5µs The continuation timer starts at VIAPTO
Recovery time 3µs tRECO

Note that for simplicity the start of the slaves' recharge is assumed to coincide with VIAPTO. The actual recharge can begin sooner or later, varying dynamically with the data stream. If the recharge starts sooner, VIAPTO is reached later, compensating for the extra charge needed. If the recharge starts later, there is less energy needed to recharge; the duration of Phase 1 is shorter, leaving more time for Phase 3 to compensate.

Note that these calculations do not account for the capacitance of the cable that connects master and slaves. To obtain the number of slaves that can be supported for a given cable, calculate the cable capacitance and add it to the total slave capacitance when calculating the duration of Phase 1 and the voltage increments achieved during Phases 2 and 3.

Appendix C

Network Overload Conditions

There can be two types of overload on a 1-Wire line, capacitive and DC. A capacitive overload appears as insufficient recovery time. It is typically seen as a spike at the end of a Write 0 time slot, i.e., when the next time slot begins before the recharge is completed. A capacitive overload is unlikely if the setup and load follow the recommendations in this application note.

DC overload occurs if there is a resistor of ~3kΩ or less connected between the 1-Wire and GND. The extra "leakage" causes the 1-Wire voltage during recovery times to drop below the driver's supply voltage. If this occurs, DC overload is visible on rising edges, as shown in Figure 5. After having reached VDD level, the voltage on the 1-Wire line drops to a lower level as soon as the IACTPU ends.

Figure 5. DC overload visible on rising edge.
Figure 5. DC overload visible on rising edge.

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© Sep 27, 2007, Maxim Integrated Products, Inc.
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APP 4104: Sep 27, 2007
APPLICATION NOTE 4104, AN4104, AN 4104, APP4104, Appnote4104, Appnote 4104