HFAN-01.0: Introduction to LVDS, PECL, and CML

Abstract: As the demand for high-speed data transmission grows, the interface between high-speed ICs becomes critical in achieving high performance, low power, and good noise immunity. Three commonly used interfaces are PECL (positive-referenced emitter-coupled logic), LVDS (low-voltage differential signals), and CML (current mode logic). When designing high-speed systems, people often encounter the problem of how to connect different ICs with different interfaces. To deal with this, it is important to understand the input and output circuit configurations of each interface for proper biasing and termination. This paper describes various ways of interconnecting between PECL, CML, and LVDS for high-speed communication systems, using Maxim products as examples.

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MAX3875 2.5Gbps, Low-Power, +3.3V Clock Recovery and Data Retiming IC  

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© Oct 12, 2000, Maxim Integrated Products, Inc.
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APP 291: Oct 12, 2000
APPLICATION NOTE 291, AN291, AN 291, APP291, Appnote291, Appnote 291