-- =================================================================== -- Copyright (c) 2000 Dallas Semiconductor -- All Rights Reserved. -- -- THIS MATERIAL IS CONSIDERED CONFIDENTIAL AND PROPRIETARY BY -- Dallas Semiconductor. UNAUTHORIZED ACCESS OR USE IS PROHIBITED. -- =================================================================== -- -- Abstract : -- BSDL file for the DS3160 Top level design. -- -- =================================================================== -- *********************************************************************** -- BSDL file for design ds3160_top -- Created by Synopsys Version 2000.11 (Nov 27, 2000) -- Designer: -- Company: Dallas Semiconductor -- Date: Thu Mar 1 15:09:58 2001 -- *********************************************************************** entity ds3160_top is -- This section identifies the default device package selected. generic (PHYSICAL_PIN_MAP: string:= "LQFP_100"); -- This section declares all the ports in the design. port ( ca0 : in bit; ca1 : in bit; ca2 : in bit; ca3 : in bit; ca4 : in bit; ca5 : in bit; ca6 : in bit; ca7 : in bit; cale : in bit; ccsz : in bit; cim : in bit; cms : in bit; crdz : in bit; cwrz : in bit; dclki : in bit; dnegi : in bit; dposi : in bit; frmecu : in bit; ftclk : in bit; ftd : in bit; ftmei : in bit; hiz : in bit; jtclk : in bit; jtdi : in bit; jtms : in bit; jtrstz : in bit; lclki : in bit; lnegi : in bit; lposi : in bit; mclk : in bit; rstz : in bit; tena1z : in bit; tena2z : in bit; testz : in bit; cd0 : inout bit; cd1 : inout bit; cd10 : inout bit; cd11 : inout bit; cd12 : inout bit; cd13 : inout bit; cd14 : inout bit; cd15 : inout bit; cd2 : inout bit; cd3 : inout bit; cd4 : inout bit; cd5 : inout bit; cd6 : inout bit; cd7 : inout bit; cd8 : inout bit; cd9 : inout bit; ftsof : inout bit; cintz : out bit; dclko : out bit; dnego : out bit; dposo : out bit; frclk : out bit; frd : out bit; frden : out bit; frlof : out bit; frlos : out bit; frsof : out bit; ftden : out bit; jtdo : out bit; lclko : out bit; lnego : out bit; lposo : out bit; rxminus : linkage bit; rxmonminus : linkage bit; rxmonplus : linkage bit; rxplus : linkage bit; tana0 : linkage bit; tana1 : linkage bit; txminus : linkage bit; txmonminus : linkage bit; txmonplus : linkage bit; txplus : linkage bit; avdd : linkage bit_vector (1 to 7); avss : linkage bit_vector (1 to 7); dvdd : linkage bit_vector (1 to 4); dvss : linkage bit_vector (1 to 6) ); use STD_1149_1_1994.all; attribute COMPONENT_CONFORMANCE of ds3160_top: entity is "STD_1149_1_1993"; attribute PIN_MAP of ds3160_top: entity is PHYSICAL_PIN_MAP; -- This section specifies the pin map for each port. This information -- is extracted from the port-to-pin map file that was read in using -- the "read_pin_map" command. constant LQFP_100: PIN_MAP_STRING := "ca0 : P40," & "ca1 : P41," & "ca2 : P42," & "ca3 : P43," & "ca4 : P44," & "ca5 : P45," & "ca6 : P46," & "ca7 : P47," & "cale : P39," & "ccsz : P68," & "cim : P72," & "cms : P73," & "crdz : P69," & "cwrz : P70," & "dclki : P97," & "dnegi : P98," & "dposi : P99," & "frmecu : P80," & "ftclk : P89," & "ftd : P78," & "ftmei : P74," & "hiz : P28," & "jtclk : P37," & "jtdi : P36," & "jtms : P34," & "jtrstz : P33," & "lclki : P17," & "lnegi : P16," & "lposi : P15," & "mclk : P91," & "rstz : P26," & "tena1z : P93," & "tena2z : P92," & "testz : P27," & "cd0 : P49," & "cd1 : P50," & "cd10 : P61," & "cd11 : P62," & "cd12 : P63," & "cd13 : P64," & "cd14 : P65," & "cd15 : P67," & "cd2 : P51," & "cd3 : P53," & "cd4 : P54," & "cd5 : P55," & "cd6 : P56," & "cd7 : P57," & "cd8 : P58," & "cd9 : P59," & "ftsof : P76," & "cintz : P71," & "dclko : P94," & "dnego : P95," & "dposo : P96," & "frclk : P87," & "frd : P85," & "frden : P84," & "frlof : P82," & "frlos : P81," & "frsof : P83," & "ftden : P77," & "jtdo : P35," & "lclko : P8," & "lnego : P7," & "lposo : P6," & "rxminus : P3," & "rxmonminus : P13," & "rxmonplus : P12," & "rxplus : P2," & "tana0 : P9," & "tana1 : P10," & "txminus : P21," & "txmonminus : P30," & "txmonplus : P29," & "txplus : P20," & "avdd : (P1, P11, P18, P19, P24, P25, P100)," & "avss : (P4, P5, P14, P22, P23, P31, P32)," & "dvdd : (P38, P52, P75, P88)," & "dvss : (P48, P60, P66, P79, P86, P90)"; -- This section specifies the TAP ports. -- For the TAP TCK port, the parameters in the brackets are: -- First Field : Maximum TCK frequency. -- Second Field: Allowable states TCK may be stopped in. attribute TAP_SCAN_CLOCK of jtclk : signal is (10.0e6, BOTH); attribute TAP_SCAN_IN of jtdi : signal is true; attribute TAP_SCAN_MODE of jtms : signal is true; attribute TAP_SCAN_OUT of jtdo : signal is true; attribute TAP_SCAN_RESET of jtrstz: signal is true; -- Specifies the number of bits in the instruction register. attribute INSTRUCTION_LENGTH of ds3160_top: entity is 3; -- Specifies the boundary-scan instructions implemented in the -- design and their opcodes. attribute INSTRUCTION_OPCODE of ds3160_top: entity is "BYPASS (111)," & "EXTEST (000)," & "SAMPLE (010)," & "CLAMP (011)," & "HIGHZ (100)," & "USER1 (101)," & "USER2 (110)," & "IDCODE (001)"; -- Specifies the bit pattern that is loaded into the instruction -- register when the TAP controller passes through the Capture-IR -- state. The standard mandates that the two LSBs must be "01". -- The remaining bits are design specific. attribute INSTRUCTION_CAPTURE of ds3160_top: entity is "001"; -- Specifies the bit pattern that is loaded into the DEVICE_ID -- register during the IDCODE instruction when the TAP controller -- passes through the Capture-DR state. attribute IDCODE_REGISTER of ds3160_top: entity is "0010" & -- 4-bit version number "0000000000001101" & -- 16-bit part number "00010100001" & -- 11-bit identity of the manufacturer "1"; -- Required by IEEE Std 1149.1 -- This section specifies the test data register placed between TDI -- and TDO for each implemented instruction. attribute REGISTER_ACCESS of ds3160_top: entity is "BYPASS (BYPASS, CLAMP, HIGHZ, USER1, USER2)," & "BOUNDARY (EXTEST, SAMPLE)," & "DEVICE_ID (IDCODE)"; -- Specifies the length of the boundary scan register. attribute BOUNDARY_LENGTH of ds3160_top: entity is 83; -- The following list specifies the characteristics of each cell -- in the boundary scan register from TDI to TDO. -- The following is a description of the label fields: -- num : Is the cell number. -- cell : Is the cell type as defined by the standard. -- port : Is the design port name. Control cells do not -- have a port name. -- function: Is the function of the cell as defined by the -- standard. Is one of input, output2, output3, -- bidir, control or controlr. -- safe : Specifies the value that the BSR cell should be -- loaded with for safe operation when the software -- might otherwise choose a random value. -- ccell : The control cell number. Specifies the control -- cell that drives the output enable for this port. -- disval : Specifies the value that is loaded into the -- control cell to disable the output enable for -- the corresponding port. -- rslt : Resulting state. Shows the state of the driver -- when it is disabled. attribute BOUNDARY_REGISTER of ds3160_top: entity is -- -- num cell port function safe [ccell disval rslt] -- "82 (BC_2, lposo, output3, X, 81, 1, Z), " & "81 (BC_2, *, controlr, 1), " & "80 (BC_2, lnego, output3, X, 81, 1, Z), " & "79 (BC_2, lclko, output3, X, 81, 1, Z), " & "78 (BC_4, lposi, observe_only, X), " & "77 (BC_4, lnegi, observe_only, X), " & "76 (BC_4, lclki, observe_only, X), " & "75 (BC_4, rstz, observe_only, X), " & "74 (BC_4, testz, observe_only, X), " & "73 (BC_4, hiz, observe_only, X), " & "72 (BC_4, cale, observe_only, X), " & "71 (BC_4, ca0, observe_only, X), " & "70 (BC_4, ca1, observe_only, X), " & "69 (BC_4, ca2, observe_only, X), " & "68 (BC_4, ca3, observe_only, X), " & "67 (BC_4, ca4, observe_only, X), " & "66 (BC_4, ca5, observe_only, X), " & "65 (BC_4, ca6, observe_only, X), " & "64 (BC_4, ca7, observe_only, X), " & "63 (BC_4, cd0, observe_only, X), " & "62 (BC_2, cd0, output3, X, 61, 1, PULL1)," & "61 (BC_2, *, controlr, 1), " & "60 (BC_4, cd1, observe_only, X), " & "59 (BC_2, cd1, output3, X, 61, 1, PULL1)," & "58 (BC_4, cd2, observe_only, X), " & "57 (BC_2, cd2, output3, X, 61, 1, PULL1)," & "56 (BC_4, cd3, observe_only, X), " & "55 (BC_2, cd3, output3, X, 61, 1, PULL1)," & "54 (BC_4, cd4, observe_only, X), " & "53 (BC_2, cd4, output3, X, 61, 1, PULL1)," & "52 (BC_4, cd5, observe_only, X), " & "51 (BC_2, cd5, output3, X, 61, 1, PULL1)," & "50 (BC_4, cd6, observe_only, X), " & "49 (BC_2, cd6, output3, X, 61, 1, PULL1)," & "48 (BC_4, cd7, observe_only, X), " & "47 (BC_2, cd7, output3, X, 61, 1, PULL1)," & "46 (BC_4, cd8, observe_only, X), " & "45 (BC_2, cd8, output3, X, 61, 1, PULL1)," & "44 (BC_4, cd9, observe_only, X), " & "43 (BC_2, cd9, output3, X, 61, 1, PULL1)," & "42 (BC_4, cd10, observe_only, X), " & "41 (BC_2, cd10, output3, X, 61, 1, PULL1)," & "40 (BC_4, cd11, observe_only, X), " & "39 (BC_2, cd11, output3, X, 61, 1, PULL1)," & "38 (BC_4, cd12, observe_only, X), " & "37 (BC_2, cd12, output3, X, 61, 1, PULL1)," & "36 (BC_4, cd13, observe_only, X), " & "35 (BC_2, cd13, output3, X, 61, 1, PULL1)," & "34 (BC_4, cd14, observe_only, X), " & "33 (BC_2, cd14, output3, X, 61, 1, PULL1)," & "32 (BC_4, cd15, observe_only, X), " & "31 (BC_2, cd15, output3, X, 61, 1, PULL1)," & "30 (BC_4, ccsz, observe_only, X), " & "29 (BC_4, crdz, observe_only, X), " & "28 (BC_4, cwrz, observe_only, X), " & "27 (BC_2, cintz, output3, X, 26, 1, Z), " & "26 (BC_2, *, controlr, 1), " & "25 (BC_4, cim, observe_only, X), " & "24 (BC_4, cms, observe_only, X), " & "23 (BC_4, ftmei, observe_only, X), " & "22 (BC_4, ftsof, observe_only, X), " & "21 (BC_2, ftsof, output3, X, 20, 1, PULL1)," & "20 (BC_2, *, controlr, 1), " & "19 (BC_2, ftden, output3, X, 18, 1, Z), " & "18 (BC_2, *, controlr, 1), " & "17 (BC_4, ftd, observe_only, X), " & "16 (BC_4, frmecu, observe_only, X), " & "15 (BC_2, frlos, output3, X, 18, 1, Z), " & "14 (BC_2, frlof, output3, X, 18, 1, Z), " & "13 (BC_2, frsof, output3, X, 18, 1, Z), " & "12 (BC_2, frden, output3, X, 18, 1, Z), " & "11 (BC_2, frd, output3, X, 18, 1, Z), " & "10 (BC_2, frclk, output3, X, 18, 1, Z), " & "9 (BC_4, ftclk, observe_only, X), " & "8 (BC_4, mclk, observe_only, X), " & "7 (BC_4, tena2z, observe_only, X), " & "6 (BC_4, tena1z, observe_only, X), " & "5 (BC_2, dclko, output3, X, 81, 1, Z), " & "4 (BC_2, dnego, output3, X, 81, 1, Z), " & "3 (BC_2, dposo, output3, X, 81, 1, Z), " & "2 (BC_4, dclki, observe_only, X), " & "1 (BC_4, dnegi, observe_only, X), " & "0 (BC_4, dposi, observe_only, X) "; end ds3160_top;