---------------------------------------------------------------------------------- -- -- File Name : DS26521_BSDL.txt -- Created by Synopsys Version 2000.11 (Nov 27, 2000) -- -- Company : Dallas Semiconductor/Maxim -- Documentation : DS26521 datasheet -- BSDL Revision : 1.1 -- Date : 8/30/2006 -- -- Device : DS26521 -- Package : 64-pin LQFP -- -- IMPORTANT NOTICE -- Dallas Semiconductor customers are advised to obtain the latest version of -- device specifications before relying on any published information contained -- herein. Dallas Semiconductor assumes no responsibility or liability arising -- out of the application of any information described herein. -- -- IMPORTANT NOTICE ABOUT THE REVISION -- -- Dallas Semiconductor customers are advised to check the revision of the -- device they will be using. All the codes for the device revisions are -- herein this BSDL file. -- -- The characters "/", "(", ")" and "*" have been removed from signal names for -- compatibility with BSDL file format. -- -- -------------------------------------------------------------------------------- entity ds26521 is -- This section identifies the default device package selected. generic (PHYSICAL_PIN_MAP: string:= "LQFP_64"); -- This section declares all the ports in the design. port ( a0 : in bit; a1 : in bit; a12 : in bit; a2 : in bit; a3 : in bit; a4 : in bit; a5 : in bit; a6 : in bit; a7 : in bit; a8 : in bit; bts : in bit; csb : in bit; jtclk : in bit; jtdi : in bit; jtms : in bit; jtrst : in bit; mclk : in bit; rdb_dsb : in bit; resetb : in bit; rring : in bit; rsysclk : in bit; rtip : in bit; spi_sel : in bit; tclk : in bit; tser : in bit; tsysclk : in bit; txen_b : in bit; wrb_rwb : in bit; d0 : inout bit; d1 : inout bit; d2 : inout bit; d3 : inout bit; d4 : inout bit; d5 : inout bit; d6 : inout bit; d7 : inout bit; rchblk_clk : inout bit; rclk : inout bit; refclkio : inout bit; rm_rfsync : inout bit; rsig : inout bit; rsync : inout bit; tchblk_clk : inout bit; tsig : inout bit; tssyncio : inout bit; tsync : inout bit; al_rsigf_flos : out bit; bpclk : out bit; intb : out bit; jtdo : out bit; rlf_ltc : out bit; rser : out bit; tring : out bit; ttip : out bit; vdd : linkage bit_vector (1 to 4); vss : linkage bit_vector (1 to 6) ); use STD_1149_1_1994.all; attribute COMPONENT_CONFORMANCE of ds26521: entity is "STD_1149_1_1993"; attribute PIN_MAP of ds26521: entity is PHYSICAL_PIN_MAP; -- This section specifies the pin map for each port. This information -- is extracted from the port-to-pin map file that was read in using -- the "read_pin_map" command. constant LQFP_64: PIN_MAP_STRING := "a0 : 25," & "a1 : 24," & "a12 : 14," & "a2 : 23," & "a3 : 20," & "a4 : 19," & "a5 : 18," & "a6 : 17," & "a7 : 16," & "a8 : 15," & "bts : 2," & "csb : 34," & "jtclk : 45," & "jtdi : 44," & "jtms : 46," & "jtrst : 47," & "mclk : 39," & "rdb_dsb : 35," & "resetb : 38," & "rring : 11," & "rsysclk : 55," & "rtip : 10," & "spi_sel : 1," & "tclk : 63," & "tser : 64," & "tsysclk : 62," & "txen_b : 13," & "wrb_rwb : 36," & "d0 : 33," & "d1 : 32," & "d2 : 31," & "d3 : 30," & "d4 : 29," & "d5 : 28," & "d6 : 27," & "d7 : 26," & "rchblk_clk : 49," & "rclk : 56," & "refclkio : 42," & "rm_rfsync : 53," & "rsig : 52," & "rsync : 54," & "tchblk_clk : 58," & "tsig : 59," & "tssyncio : 60," & "tsync : 61," & "al_rsigf_flos : 51," & "bpclk : 48," & "intb : 37," & "jtdo : 43," & "rlf_ltc : 50," & "rser : 57," & "tring : 7," & "ttip : 6," & "vdd : (5, 9, 21, 40)," & "vss : (8, 12, 22, 41, 3, 4)"; -- This section specifies the TAP ports. -- For the TAP TCK port, the parameters in the brackets are: -- First Field : Maximum TCK frequency. -- Second Field: Allowable states TCK may be stopped in. attribute TAP_SCAN_CLOCK of jtclk: signal is (10.0e6, BOTH); attribute TAP_SCAN_IN of jtdi : signal is true; attribute TAP_SCAN_MODE of jtms : signal is true; attribute TAP_SCAN_OUT of jtdo : signal is true; attribute TAP_SCAN_RESET of jtrst: signal is true; -- Specifies the number of bits in the instruction register. attribute INSTRUCTION_LENGTH of ds26521: entity is 3; -- Specifies the boundary-scan instructions implemented in the -- design and their opcodes. attribute INSTRUCTION_OPCODE of ds26521: entity is "BYPASS (111)," & "EXTEST (000)," & "SAMPLE (010)," & "CLAMP (011)," & "USER1 (100)," & "USER2 (101)," & "USER3 (110)," & "IDCODE (001)"; -- Specifies the bit pattern that is loaded into the instruction -- register when the TAP controller passes through the Capture-IR -- state. The standard mandates that the two LSBs must be "01". -- The remaining bits are design specific. attribute INSTRUCTION_CAPTURE of ds26521: entity is "001"; -- Specifies the bit pattern that is loaded into the DEVICE_ID -- register during the IDCODE instruction when the TAP controller -- passes through the Capture-DR state. attribute IDCODE_REGISTER of ds26521: entity is "0000" & -- 4-bit version number "0000000010001000" & -- 16-bit part number "00010100001" & -- 11-bit identity of the manufacturer "1"; -- Required by IEEE Std 1149.1 -- This section specifies the test data register placed between TDI -- and TDO for each implemented instruction. attribute REGISTER_ACCESS of ds26521: entity is "BYPASS (BYPASS, CLAMP, USER1, USER2, USER3)," & "BOUNDARY (EXTEST, SAMPLE)," & "DEVICE_ID (IDCODE)"; -- Specifies the length of the boundary scan register. attribute BOUNDARY_LENGTH of ds26521: entity is 86; -- The following list specifies the characteristics of each cell -- in the boundary scan register from TDI to TDO. -- The following is a description of the label fields: -- num : Is the cell number. -- cell : Is the cell type as defined by the standard. -- port : Is the design port name. Control cells do not -- have a port name. -- function: Is the function of the cell as defined by the -- standard. Is one of input, output2, output3, -- bidir, control or controlr. -- safe : Specifies the value that the BSR cell should be -- loaded with for safe operation when the software -- might otherwise choose a random value. -- ccell : The control cell number. Specifies the control -- cell that drives the output enable for this port. -- disval : Specifies the value that is loaded into the -- control cell to disable the output enable for -- the corresponding port. -- rslt : Resulting state. Shows the state of the driver -- when it is disabled. attribute BOUNDARY_REGISTER of ds26521: entity is -- -- num cell port function safe [ccell disval rslt] -- "85 (BC_4, spi_sel, observe_only, X), " & "84 (BC_4, bts, observe_only, X), " & "83 (BC_4, txen_b, observe_only, X), " & "82 (BC_4, a12, observe_only, X), " & "81 (BC_4, a8, observe_only, X), " & "80 (BC_4, a7, observe_only, X), " & "79 (BC_4, a6, observe_only, X), " & "78 (BC_4, a5, observe_only, X), " & "77 (BC_4, a4, observe_only, X), " & "76 (BC_4, a3, observe_only, X), " & "75 (BC_4, a2, observe_only, X), " & "74 (BC_4, a1, observe_only, X), " & "73 (BC_4, a0, observe_only, X), " & "72 (BC_4, d7, observe_only, X), " & "71 (BC_2, d7, output3, X, 70, 1, Z), " & "70 (BC_2, *, controlr, 1), " & "69 (BC_4, d6, observe_only, X), " & "68 (BC_2, d6, output3, X, 67, 1, Z), " & "67 (BC_2, *, controlr, 1), " & "66 (BC_4, d5, observe_only, X), " & "65 (BC_2, d5, output3, X, 64, 1, Z), " & "64 (BC_2, *, controlr, 1), " & "63 (BC_4, d4, observe_only, X), " & "62 (BC_2, d4, output3, X, 61, 1, Z), " & "61 (BC_2, *, controlr, 1), " & "60 (BC_4, d3, observe_only, X), " & "59 (BC_2, d3, output3, X, 58, 1, Z), " & "58 (BC_2, *, controlr, 1), " & "57 (BC_4, d2, observe_only, X), " & "56 (BC_2, d2, output3, X, 55, 1, Z), " & "55 (BC_2, *, controlr, 1), " & "54 (BC_4, d1, observe_only, X), " & "53 (BC_2, d1, output3, X, 52, 1, Z), " & "52 (BC_2, *, controlr, 1), " & "51 (BC_4, d0, observe_only, X), " & "50 (BC_2, d0, output3, X, 49, 1, Z), " & "49 (BC_2, *, controlr, 1), " & "48 (BC_4, csb, observe_only, X), " & "47 (BC_4, rdb_dsb, observe_only, X), " & "46 (BC_4, wrb_rwb, observe_only, X), " & "45 (BC_2, intb, output3, X, 44, 1, PULL1)," & "44 (BC_2, *, controlr, 1), " & "43 (BC_4, resetb, observe_only, X), " & "42 (BC_4, mclk, observe_only, X), " & "41 (BC_4, refclkio, observe_only, X), " & "40 (BC_2, refclkio, output3, X, 39, 1, Z), " & "39 (BC_2, *, controlr, 1), " & "38 (BC_2, bpclk, output3, X, 37, 1, Z), " & "37 (BC_2, *, controlr, 1), " & "36 (BC_4, rchblk_clk, observe_only, X), " & "35 (BC_2, rchblk_clk, output3, X, 34, 1, Z), " & "34 (BC_2, *, controlr, 1), " & "33 (BC_2, rlf_ltc, output3, X, 32, 1, Z), " & "32 (BC_2, *, controlr, 1), " & "31 (BC_2, al_rsigf_flos, output3, X, 30, 1, Z), " & "30 (BC_2, *, controlr, 1), " & "29 (BC_4, rsig, observe_only, X), " & "28 (BC_2, rsig, output3, X, 27, 1, Z), " & "27 (BC_2, *, controlr, 1), " & "26 (BC_4, rm_rfsync, observe_only, X), " & "25 (BC_2, rm_rfsync, output3, X, 24, 1, Z), " & "24 (BC_2, *, controlr, 1), " & "23 (BC_4, rsync, observe_only, X), " & "22 (BC_2, rsync, output3, X, 21, 1, Z), " & "21 (BC_2, *, controlr, 1), " & "20 (BC_4, rsysclk, observe_only, X), " & "19 (BC_4, rclk, observe_only, X), " & "18 (BC_2, rclk, output3, X, 17, 1, Z), " & "17 (BC_2, *, controlr, 1), " & "16 (BC_2, rser, output3, X, 15, 1, Z), " & "15 (BC_2, *, controlr, 1), " & "14 (BC_4, tchblk_clk, observe_only, X), " & "13 (BC_2, tchblk_clk, output3, X, 12, 1, Z), " & "12 (BC_2, *, controlr, 1), " & "11 (BC_4, tsig, observe_only, X), " & "10 (BC_2, tsig, output3, X, 9, 1, Z), " & "9 (BC_2, *, controlr, 1), " & "8 (BC_4, tssyncio, observe_only, X), " & "7 (BC_2, tssyncio, output3, X, 6, 1, Z), " & "6 (BC_2, *, controlr, 1), " & "5 (BC_4, tsync, observe_only, X), " & "4 (BC_2, tsync, output3, X, 3, 1, Z), " & "3 (BC_2, *, controlr, 1), " & "2 (BC_4, tsysclk, observe_only, X), " & "1 (BC_4, tclk, observe_only, X), " & "0 (BC_4, tser, observe_only, X) "; end ds26521;