-- File Name :DS2156CSBGA.BSD -- Created by :Dallas Semiconductor -- Documentation :DS2156 series data sheets -- -- -- -- BSDL Revision :1.0 -- -- Date created :07/19/2005 -- Date modified : -- Device :DS2156G -- Package :100-pin CSBGA -- -- IMPORTANT NOTICE -- -- Dallas Semiconductor customers are advised to obtain the latest version -- of device specifications before relying on any published information -- contained herein. Dallas Semiconductor assumes no responsibility or -- liability arising out of the application of any information described -- herein. -- -- -- IMPORTANT NOTICE ABOUT THE REVISION -- -- Dallas Semiconductor customers are advised to check the revision of the -- device they will be using. All the codes for the device revisions are -- herein this BSDL file. -- -- The characters "/", "(", ")" and "*" have been removed from signal names -- for compatibility with BSDL file format. -- -- entity DS2156CSBGA is generic (PHYSICAL_PIN_MAP : string := "CGBGA_100"); port ( RCHBLK :buffer bit; JTMS :in bit; BPCLK :inout bit; JTCLK :in bit; JTRST :in bit; RCL :buffer bit; JTDI :in bit; UOP0 :inout bit; UOP1 :inout bit; JTDO :out bit; BTS :in bit; LIUC :inout bit; CLK8X :buffer bit; TSTRST :in bit; UOP2 :buffer bit; RTIP :in bit; RRING :in bit; MCLK :in bit; XTALD :buffer bit; UOP3 :inout bit; INT :out bit; TUSEL :in bit; TTIP :buffer bit; TRING :buffer bit; TCHBLK :inout bit; TLCLK :inout bit; TLINK :in bit; ESIBS0 :inout bit; TSYNC :inout bit; TPOSI :in bit; TNEGI :in bit; TCLKI :in bit; TCLKO :inout bit; TNEGO :inout bit; TPOSO :inout bit; TCLK :in bit; TSER :in bit; TSIG :in bit; TESO :buffer bit; TDATA :in bit; TSYSCLK :in bit; TSSYNC :in bit; TCHCLK :inout bit; ESIBS1 :inout bit; MUX :in bit; D0AD0 :inout bit; D1AD1 :inout bit; D2AD2 :inout bit; D3AD3 :inout bit; D4AD4 :inout bit; D5AD5 :inout bit; D6AD6 :inout bit; D7AD7 :inout bit; A0 :in bit; A1 :in bit; A2 :in bit; A3 :in bit; A4 :in bit; A5 :in bit; A6 :in bit; ALEASA7 :in bit; RDDS :in bit; CS :in bit; ESIBRD :inout bit; WRRW :in bit; RLINK :buffer bit; RLCLK :buffer bit; RCLK :buffer bit; RDATA :buffer bit; RPOSI :inout bit; RNEGI :inout bit; RCLKI :inout bit; RCLKO :buffer bit; RNEGO :buffer bit; RPOSO :buffer bit; RCHCLK :inout bit; RSIGF :inout bit; RSIG :inout bit; RSER :buffer bit; RMSYNC :inout bit; RFSYNC :inout bit; RSYNC :inout bit; RLOSLOTC :buffer bit; RSYSCLK :inout bit; VDD :linkage bit_vector(1 to 6); VSS :linkage bit_vector(1 to 8); NoConnect :linkage bit_vector(1 to 3) ); use STD_1149_1_1994.all; attribute COMPONENT_CONFORMANCE of DS2156CSBGA : entity is "STD_1149_1_1993"; attribute PIN_MAP of DS2156CSBGA : entity is PHYSICAL_PIN_MAP; constant CSBGA_100 : PIN_MAP_STRING := "RCHBLK:A1,"& "JTMS:B2,"& "BPCLK:C3,"& "JTCLK:B1,"& "JTRST:D4,"& "RCL:C2,"& "JTDI:C1,"& "UOP0:D3,"& "UOP1:D2,"& "JTDO:D1,"& "BTS:E3,"& "LIUC:E2,"& "CLK8X:E1,"& "TSTRST:E4,"& "UOP2:E5,"& "RTIP:F1,"& "RRING:F2,"& "MCLK:G2,"& "XTALD:H1,"& "UOP3:G3,"& "INT:H2,"& "TUSEL:K1,"& "TTIP:K2,"& "TRING:K3,"& "TCHBLK:H4,"& "TLCLK:J4,"& "TLINK:K4,"& "ESIBS0:H5,"& "TSYNC:J5,"& "TPOSI:K5,"& "TNEGI:G5,"& "TCLKI:F5,"& "TCLKO:K6,"& "TNEGO:J6,"& "TPOSO:H6,"& "TCLK:J7,"& "TSER:K8,"& "TSIG:H7,"& "TESO:K9,"& "TDATA:J8,"& "TSYSCLK:K10,"& "TSSYNC:J9,"& "TCHCLK:H8,"& "ESIBS1:J10,"& "MUX:G7,"& "D0AD0:H9,"& "D1AD1:H10,"& "D2AD2:G8,"& "D3AD3:G9,"& "D4AD4:F9,"& "D5AD5:F10,"& "D6AD6:F7,"& "D7AD7:F6,"& "A0:E10,"& "A1:E9,"& "A2:E8,"& "A3:D10,"& "A4:E7,"& "A5:D9,"& "A6:C10,"& "ALEASA7:D8,"& "RDDS:B10,"& "CS:C9,"& "ESIBRD:A10,"& "WRRW:B9,"& "RLINK:C8,"& "RLCLK:A9,"& "RCLK:A8,"& "RDATA:A7,"& "RPOSI:C6,"& "RNEGI:B6,"& "RCLKI:A6,"& "RCLKO:D6,"& "RNEGO:E6,"& "RPOSO:A5,"& "RCHCLK:B5,"& "RSIGF:C5,"& "RSIG:A4,"& "RSER:D5,"& "RMSYNC:B4,"& "RFSYNC:A3,"& "RSYNC:C4,"& "RLOSLOTC:A2,"& "RSYSCLK:B3,"& "VDD:(F3, J3, K7, F8, B8, C7),"& "VSS:(G1, F4, J1, G4, G6, G10, D7, B7),"& "NoConnect:(H3, J2)"; attribute TAP_SCAN_IN of JTDI :signal is true; attribute TAP_SCAN_MODE of JTMS :signal is true; attribute TAP_SCAN_OUT of JTDO :signal is true; attribute TAP_SCAN_RESET of JTRST :signal is true; attribute TAP_SCAN_CLOCK of JTCLK :signal is (10.00e6,BOTH); attribute INSTRUCTION_LENGTH of DS2156CSBGA :entity is 3; attribute INSTRUCTION_OPCODE of DS2156CSBGA :entity is "EXTEST (000),"& "BYPASS (111),"& "SAMPLE (010),"& "IDCODE (001),"& "CLAMP (011),"& "HIGHZ (100)"; attribute INSTRUCTION_CAPTURE of DS2156CSBGA :entity is "001"; attribute IDCODE_REGISTER of DS2156CSBGA :entity is -- 00019143 (HEX) "0000"& -- 4 bit Version for A2 OF DS2156 "0000000000011001"& -- 16-bit Part Number "00010100001"& -- 11-bit Manufacturer's Identity "1"; -- Mandatory LSB attribute BOUNDARY_LENGTH of DS2156CSBGA :entity is 99; attribute BOUNDARY_REGISTER of DS2156CSBGA :entity is "0 (BC_1, RCL,output2,X),"& "1 (BC_1, BPCLK,bidir,0,2,0,Z),"& "2 (BC_2, *,control,0),"& "3 (BC_1, RCHBLK,output2,X),"& "4 (BC_1, RSYSCLK,bidir,0,5,0,Z),"& "5 (BC_2, *,control,0),"& "6 (BC_1, RLOSLOTC,output2,X),"& "7 (BC_7, RSYNC,bidir,0,6,0,Z),"& "8 (BC_2, *,control,0),"& "9 (BC_1, RFSYNC,bidir,0,10,0,Z),"& "10 (BC_2, *,control,0),"& "11 (BC_1, RMSYNC,bidir,0,12,0,Z),"& "12 (BC_2, *,control,0),"& "13 (BC_1, RSER,output2,X),"& "14 (BC_1, RSIG,bidir,0,15,0,Z),"& "15 (BC_2, *,control,0),"& "16 (BC_1, RSIGF,bidir,0,17,0,Z),"& "17 (BC_2, *,control,0),"& "18 (BC_1, RCHCLK,bidir,0,19,0,Z),"& "19 (BC_2, *,control,0),"& "20 (BC_1, RPOSO,output2,X),"& "21 (BC_1, RNEGO,output2,X),"& "22 (BC_1, RCLKO,output2,X),"& "23 (BC_1, RCLKI,bidir,0,24,0,Z),"& "24 (BC_2, *,control,0),"& "25 (BC_1, RNEGI,bidir,0,26,0,Z),"& "26 (BC_2, *,control,0),"& "27 (BC_1, RPOSI,bidir,0,28,0,Z),"& "28 (BC_2, *,control,0),"& "29 (BC_1, RDATA,output2,X),"& "30 (BC_1, RCLK,output2,X),"& "31 (BC_1, RLCLK,output2,X),"& "32 (BC_1, RLINK,output2,X),"& "33 (BC_1, WRRW,input,X),"& "34 (BC_7, ESIBRD,bidir,0,35,0,Z),"& "35 (BC_2, *,control,0),"& "36 (BC_1, CS,input,X),"& "37 (BC_1, RDDS,input,X),"& "38 (BC_1, ALEASA7,input,X),"& "39 (BC_1, A6,input,X),"& "40 (BC_1, A5,input,X),"& "41 (BC_1, A4,input,X),"& "42 (BC_1, A3,input,X),"& "43 (BC_1, A2,input,X),"& "44 (BC_1, A1,input,X),"& "45 (BC_1, A0,input,X),"& "46 (BC_7, D7AD7,bidir,0,54,0,Z),"& "47 (BC_7, D6AD6,bidir,0,54,0,Z),"& "48 (BC_7, D5AD5,bidir,0,54,0,Z),"& "49 (BC_7, D4AD4,bidir,0,54,0,Z),"& "50 (BC_7, D3AD3,bidir,0,54,0,Z),"& "51 (BC_7, D2AD2,bidir,0,54,0,Z),"& "52 (BC_7, D1AD1,bidir,0,54,0,Z),"& "53 (BC_7, D0AD0,bidir,0,54,0,Z),"& "54 (BC_2, *,control,0),"& "55 (BC_1, MUX,input,X),"& "56 (BC_7, ESIBS1,bidir,0,57,0,Z),"& "57 (BC_2, *,control,0),"& "58 (BC_1, TCHCLK,bidir,0,59,0,Z),"& "59 (BC_2, *,control,0),"& "60 (BC_1, TSSYNC,input,X),"& "61 (BC_1, TSYSCLK,input,X),"& "62 (BC_1, TDATA,input,X),"& "63 (BC_1, TESO,output2,X),"& "64 (BC_1, TSIG,input,X),"& "65 (BC_1, TSER,input,X),"& "66 (BC_1, TCLK,input,X),"& "67 (BC_1, TPOSO,bidir,0,68,0,Z),"& "68 (BC_2, *,control,0),"& "69 (BC_1, TNEGO,bidir,0,70,0,Z),"& "70 (BC_2, *,control,0),"& "71 (BC_1, TCLKO,bidir,0,72,0,Z),"& "72 (BC_2, *,control,0),"& "73 (BC_1, TCLKI,input,X),"& "74 (BC_1, TNEGI,input,X),"& "75 (BC_1, TPOSI,input,X),"& "76 (BC_7, TSYNC,bidir,0,77,0,Z),"& "77 (BC_2, *,control,0),"& "78 (BC_7, ESIBS0,bidir,0,79,0,Z),"& "79 (BC_2, *,control,0),"& "80 (BC_1, TLINK,input,X),"& "81 (BC_1, TLCLK,bidir,0,82,0,Z),"& "82 (BC_2, *,control,0),"& "83 (BC_1, TCHBLK,bidir,0,84,0,Z),"& "84 (BC_2, *,control,0),"& "85 (BC_1, TUSEL,input,X),"& "86 (BC_1, INT,output2,X),"& "87 (BC_1, UOP3,bidir,0,88,0,Z),"& "88 (BC_2, *,control,0),"& "89 (BC_1, UOP2,output2,X),"& "90 (BC_1, TSTRST,input,X),"& "91 (BC_1, CLK8X,output2,X),"& "92 (BC_1, LIUC,bidir,0,93,0,Z),"& "93 (BC_2, *,control,0),"& "94 (BC_1, BTS,input,X),"& "95 (BC_1, UOP1,bidir,0,96,0,Z),"& "96 (BC_2, *,control,0),"& "97 (BC_1, UOP0,bidir,0,98,0,Z),"& "98 (BC_2, *,control,0)"; end DS2156CSBGA;