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电路监控、电压监测器及排序器 
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主要特征
应用/用途
Parametric specs for Supervisors (1 Monitored Voltage)
| Reset Thresh. (V) | 2.5 to 3.3 3.3 to 5.5 |
| Reset Thresh. Accur. (%) (@ +25°C) | 2.5 |
| Reset Out | Active High Active Low Push-Pull |
| tRESET (min) | 85ms to 300ms |
| Watchdog Feature | Cap Adjustable Input (WDI) Input/Output (WDI/WDO) |
| Watchdog Timeout | 1s to 2s <1s >2s Adjustable |
| Supervisor Features | Manual Reset Power Fail Comparator/Low Battery Detect |
| ICC (µA) (max) | 150 |
| Package/Pins | PDIP/16 SOIC (N)/16 |
| Budgetary Price (See Notes) | 4.51 |
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Technical Docs
| 数据资料 | 微处理器及非易失存储器监控电路 | Mar 14, 2006 |
参量
Parametric specs for Supervisors (1 Monitored Voltage)
| Reset Thresh. (V) | 2.5 to 3.3 3.3 to 5.5 |
| Reset Thresh. Accur. (%) (@ +25°C) | 2.5 |
| Reset Out | Active High Active Low Push-Pull |
| tRESET (min) | 85ms to 300ms |
| Watchdog Feature | Cap Adjustable Input (WDI) Input/Output (WDI/WDO) |
| Watchdog Timeout | 1s to 2s <1s >2s Adjustable |
| Supervisor Features | Manual Reset Power Fail Comparator/Low Battery Detect |
| ICC (µA) (max) | 150 |
| Package/Pins | PDIP/16 SOIC (N)/16 |
| Budgetary Price (See Notes) | 4.51 |
主要特征
- Manual-Reset Input
- 200ms Power OK/Reset Time Delay
- Independent Watchdog Timer-Preset or Adjustable
- On-Board Gating of Chip-Enable Signals
- Memory Write-Cycle Completion
- 10ns (max) Chip-Enable Gate Propagation Delay
- Voltage Monitor for Overvoltage Warning
- ±2% Reset and Low-Line Threshold Accuracy (MAX820, external programming mode)
应用/用途
- 计算机：台式机、工作站和服务器
- 控制器
- 精确的µP监控
- 智能仪表
描述
The MAX792/MAX820 microprocessor (µP) supervisory circuits provide the most functions for power-supply and watchdog monitoring in systems without battery backup. Built-in features include the following:
- µP reset: Assertion of RESET and active-low RESET outputs during power-up, power-down, and brownout conditions. Active-low RESET is guaranteed valid for VCC down to 1V.
- Manual-reset input.
- Two-stage power-fail warning: A separate low-line comparator compares VCC to a preset threshold 120mV above the reset threshold; the low-line and reset thresholds can be programmed externally.
- Watchdog fault output: Assertion of active-low WDO if the watchdog input is not toggled within a preset timeout period.
- Pulsed watchdog output: Advance warning of impending active-low WDO assertion from watchdog timeout that causes hardware shutdown.
- Write protection of CMOS RAM, EEPROM, or other memory devices.
Technical Docs
| 数据资料 | 微处理器及非易失存储器监控电路 | Mar 14, 2006 |
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