- Power fail detect with referenced comparator, NMI:
- Warns microprocessor of an impending power failure
- Holds microprocessor in check during power transients
- Halts and restarts an out-of-control microprocessor
- Provides orderly shutdown in nonvolatile microprocessor applications
- Invokes sleep mode
- Pushbutton reset:
- Monitors pushbutton for external override
- Controls external power switch for high-current applications
- Controls low-power stop mode in battery operated hand-held applications
- Watchdog timer
- 5V operation with active high and low resets:
- ±5% of 5V (DS1238-5, DS1238A-5)
- ±10% of 5V (DS1238, DS1238A)
- Battery switch:
- Converts CMOS SRAM into nonvolatile memory
- Control pins gate to external power switch for high-current applications
- CE control:
- Unconditionally write-protects memory when power supply is out of tolerance
- Optional freshness mode (DS1238) seals battery until first power-on
- Consumes less than 200nA of battery current at 25°C
- Operating ranges:
- DS1238, DS1238A: 0°C to +70°C
- DS1238-IND, DS1238A-IND: -40°C to +85°C
- Pin-for-pin compatibility with MAX691, MAX693, MAX695
- Optional internal or external timing control
- A precision temperature-compensated reference and comparator continuously monitor the system power supply. If Vcc levels breach threshold tolerance, an internal power-fail signal is generated which activates reset. When power returns to tolerance, the DS1238 holds reset for a minimum of 50ms (typically 100ms) while the power supply and processor stabilize. Optional threshold levels are available: the DS1238-5 and DS1238A-5 for resets at ±5% of a 5V supply; and the DS1238-10 and DS1238A-10 for ±10% of a 5V supply.
- The watchdog timer circuitry monitors software execution. If a strobe input is not driven low prior to user-set timeouts the timer forces a processor reset.
- The DS1238 enables external override by debouncing the pushbutton input. A minimum active reset pulse width is provided.
- An on-chip switch directs SRAM power between Vcc or an external battery, whichever is greater. This switched supply can also back up a CMOS microprocessor.
- To enable write protection upon the detection of a power-fail condition, the chip enable output is held to within 0.3V Vcc or to within 0.7V of battery input.
- Alternative oscillator control pins provide either external or internal clock timing for both the reset pulse width and the watchdog timeout period.