产品详情
Reset Thresh. (V) | 3.3 to 5.5 |
Reset Thresh. Accur. (%) (@ +25°C) | 2.5 |
Reset Out | Active High Active Low Open Drain Push-Pull |
tRESET (min) | 85ms to 300ms |
Watchdog Feature | Input (WDI) |
Watchdog Timeout | 1s to 2s <1s |
Supervisor Features | Manual Reset |
ICC (µA) (max) | 50 |
Package/Pins | PDIP/8 SOIC (N)/8 SOIC (W)/16 UMAX/8 |
Budgetary Price (See Notes) | 1.54 |
简化框图
Technical Docs
数据资料 | 低功耗、MicroMonitor芯片 | Nov 18, 1999 |
支持和培训
采样:
选择上方“样片”按钮将重定向至第三方ADI样片网站。登录后,所选部件将转移到您在此网站上的购物车。如果您之前从未使用过此网站,请创建一个新帐户。有关此样片网站的任何问题,请联系SampleSupport@analog.com。
参量
Reset Thresh. (V) | 3.3 to 5.5 |
Reset Thresh. Accur. (%) (@ +25°C) | 2.5 |
Reset Out | Active High Active Low Open Drain Push-Pull |
tRESET (min) | 85ms to 300ms |
Watchdog Feature | Input (WDI) |
Watchdog Timeout | 1s to 2s <1s |
Supervisor Features | Manual Reset |
ICC (µA) (max) | 50 |
Package/Pins | PDIP/8 SOIC (N)/8 SOIC (W)/16 UMAX/8 |
Budgetary Price (See Notes) | 1.54 |
主要特征
应用/用途
描述
The DS1232LP/LPS Low-Power MicroMonitor Chip monitors three vital conditions for a microprocessor: power supply, software execution, and external override. First, a precision temperature-compensated reference and comparator circuit monitors the status of VCC. When an out-of-tolerance condition occurs, an internal power-fail signal is generated, which forces reset to the active state. When VCC returns to an in-tolerance condition, the reset signals are kept in the active state for a minimum of 250ms to allow the power supply and processor to stabilize.
Technical Docs
数据资料 | 低功耗、MicroMonitor芯片 | Nov 18, 1999 |
支持和培训
采样:
选择上方“样片”按钮将重定向至第三方ADI样片网站。登录后,所选部件将转移到您在此网站上的购物车。如果您之前从未使用过此网站,请创建一个新帐户。有关此样片网站的任何问题,请联系SampleSupport@analog.com。