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SPI/MICROWIRE兼容UART

产品详情

主要特征

Parametric specs for SPI/Microwire-Compatible UARTs
µP I/F SPI and Microwire Compatible
# Channels 1
ICC (mA) (typ) 0.27
VSUPPLY (V) 2.7 to 5.5
Package/Pins PDIP/14
QSOP/16
TQFN/24
Oper. Temp. (°C) -40 to +85
0 to +70
Budgetary
Price (See Notes)
4.3

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参量

Parametric specs for SPI/Microwire-Compatible UARTs
µP I/F SPI and Microwire Compatible
# Channels 1
ICC (mA) (typ) 0.27
VSUPPLY (V) 2.7 to 5.5
Package/Pins PDIP/14
QSOP/16
TQFN/24
Oper. Temp. (°C) -40 to +85
0 to +70
Budgetary
Price (See Notes)
4.3

主要特征

  • Small TQFN and QSOP Packages Available
  • Full-Featured UART:
    • IrDA SIR Timing Compatible
    • 8-Word FIFO Minimizes Processor Overhead at High Data Rates
    • Up to 230k Baud with a 3.6864MHz Crystal
    • 9-Bit Address-Recognition Interrupt
    • Receive Activity Interrupt in Shutdown
  • SPI/MICROWIRE-Compatible µC Interface
  • Lowest Power:
    • 150µA Operating Current at 3.3V
    • 10µA in Shutdown with Receive Interrupt
  • +2.7V to +5.5V Supply Voltage in Operating Mode
  • Schmitt-Trigger Inputs for Opto-Couplers
  • TX and RTS Outputs Sink 25mA for Opto-Couplers

应用/用途

  • 手持式仪表(PDA、掌上电脑)
  • 智能仪表
  • 隔离型RS-232/RS-485:直接驱动光耦
  • 低成本IR数据链接,用于计算机/外设
  • HVAC或楼宇控制中的小型网络
  • SPI系统中的UART

描述

The MAX3100 universal asynchronous receiver transmitter (UART) is the first UART specifically optimized for small microcontroller-based systems. Using an SPI™/MICROWIRE™ interface for communication with the host microcontroller (µC), the MAX3100 comes in a compact 24-pin-TQFN and 16-pin QSOP. The asynchronous I/O is suitable for use in RS-232, RS-485, IR, and opto-isolated data links. IR-link communication is easy with the MAX3100's infrared data association (IrDA) timing mode.

The MAX3100 includes a crystal oscillator and a baud-rate generator with software-programmable divider ratios for all common baud rates from 300 baud to 230k baud. A software- or hardware-invoked shutdown lowers quiescent current to 10µA, while allowing the MAX3100 to detect receiver activity.

An 8-word-deep first-in/first-out (FIFO) buffer minimizes processor overhead. This device also includes a flexible interrupt with four maskable sources, including address recognition on 9-bit networks. Two hardware-handshaking control lines are included (one input and one output).

The MAX3100 is available in 14-pin plastic DIP and small, 16-pin QSOP packages in the commercial and extended temperature ranges.

简化框图

MAX3100:典型工作电路 MAX3100:典型工作电路 Zoom icon

Technical Docs

支持和培训

在Maxim的知识库中搜索技术问题的答案

过滤搜索

Maxim的专业工程师团队也会为您解答相应的技术问题,请访问Maxim的 支持中心