MAX5855EXE+T

16-Bit, 4.9Gsps Wideband Interpolating and Modulating RF DAC with JESD204B Interface

Direct RF Synthesis of 1000MHz Instantaneous Bandwidth from DC to Greater than 2.45GHz


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说明

The MAX5855 high-performance, interpolating and modulating, 16-bit, 4.9Gsps RF DAC can directly synthesize up to 1000MHz of instantaneous bandwidth from DC to frequencies greater than 2.45GHz. The device is optimized for cable access and digital video broadcast applications and meets spectral emission requirements for a broad set of radio transmitters and modulators including DOCSIS 3.1/3.0, DVB-C/C2, DVB-T2, DVB-S2X, ISDB-T, and EPoC.

The device integrates interpolation filters, a digital quadrature modulator, a numerically controlled oscillator (NCO), clock multiplying PLL + VCO and a 14-bit RF DAC core. The 4x linear phase interpolation filter simplifies reconstruction filtering, while enhancing passband dynamic performance, and reducing the input data bandwidth required from an FPGA. The NCO allows for fully agile modulation of the input baseband signal for direct RF synthesis.

The MAX5855 input interface accepts 16-bit input data by way of a five-lane, JESD204B SerDes data input interface that is Subclass-0 compliant and operates at a data rate of 9.8304Gbps.

The MAX5855 clock input has a flexible interface that accepts a differential sine-wave or square-wave reference input clock signal at 245.75MHz, 491.52MHz, or 983.04MHz. A clock multiplying PLL and VCO is used to internally generate the 4.9152GHz sampling clock from the reference clock. The device provides a divided reference clock output to ensure synchronization between the data source and the DAC.

The integrated RF DAC uses a differential current-steering architecture that includes a differential 50Ω internal termination and can produce a 3dBm full-scale output signal level on a 50Ω external load. Operating from 1.0V and 1.8V power supplies, the device consumes 2.7W at 4.9Gsps. The device is offered in a compact 144-pin, 10mm x 10mm, FCCSP package and is specified for the extended industrial temperature range (-40°C to +85°C).

MAX5855, MAX5855EXE, MAX5855EXE+T:Simplified Block Diagram MAX5855, MAX5855EXE, MAX5855EXE+T: Simplified Block Diagram 放大+

关键特性

  • Simplifies RF Design and Enables New Communication Architectures
    • Eliminates I/Q Imbalance and LO Feedthrough
    • Enables Multi-Band RF Modulation
    Direct RF Synthesis of 1GHz Bandwidth
    • 4.9152Gsps DAC Output Update Rate
    • High-Performance 14-Bit RF DAC Core
    • Digital Baseband I/Q with 4x Interpolation
    • Digital Quadrature Modulator + NCO for Full Agility
    • Sub-1Hz NCO Resolution
    • Integrated Clock Multiplying PLL + VCO
  • Flexible and Configurable
    • 5-Lane JESD204B Input Data Interface
      • Subclass-0 Compliant
      • 9.8304Gbps Per Lane
  • Divided Reference Clock Output
  • SPI Interface for Device Configuration

应用

  • 数字视频广播调制器
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  • 同轴电缆以太网PON (EPoC)
  • 仪表
  • 点对点无线通信
Part NumberResolution
(bits)
fCLK
(Msps)
ChannelsSFDR
(dBc)
DNL
(±LSB)
INL
(±LSB)
IOUT
(mA)
PDISS
(mW)
InterfaceVSUPPLY
(V)
Package/PinsBudgetary
Price
@ fOUTSee Notes
MAX5855 164900174 @ 1000MHz1.53402700JESD204B
1
1.8
FCBGA/144
$114.21 @1k
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Pricing Notes:
价格仅供参考,用于同类产品的比较。所提供报价为美元,需要依汇率折合成人民币。该价格将因当地关税、税率和汇率而异。有关特定订购量和指定版本的报价和供货问题,请参考:价格与供货网站或与指定代理商联系。


MAX5855EVKIT: Evaluation Kit for the MAX5855

质量和环境数据

申请可靠性报告: MAX5855EXE+T 
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CAD Symbols and Footprints

  • MAX5855EXE+
  • MAX5855EXE+T
  • 型号   生产流程   工艺   样本量   不合格   FIT @ 25°C   FIT @ 55°C  

    备注: 通过技术手段对故障率进行汇总,并映射到相关的材料部件号。 故障率与被测件的数量密切相关。

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